Commit 9ad676e5 authored by Jyri Sarha's avatar Jyri Sarha
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dt-bindings: display: ti,k2g-dss: Add dt-schema yaml binding



Add dt-schema yaml bindig for K2G DSS, an ultra-light version of TI
Keystone Display SubSystem.

Version history:

v2: no change

v3: - Add ports node
    - Add includes to dts example
    - reindent dts example

v4: - Add descriptions to reg and clocks properties
    - Remove minItems when its value is the same as maxItems value
    - Remove ports node

v5: - itemize reg and clocks properties' descriptions

v6: - Add Reviewed-by: from Rob Herring <robh@kernel.org> and
      Benoit Parrot <bparrot@ti.com>

v7: no change

v8: no change

v9: - Remove ports-node from the dts example

Signed-off-by: default avatarJyri Sarha <jsarha@ti.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Reviewed-by: default avatarBenoit Parrot <bparrot@ti.com>
Link: https://patchwork.freedesktop.org/patch/msgid/270297321f0768c10e241d289e3ac10e39cf12a9.1580129724.git.jsarha@ti.com
parent d20615f8
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
# Copyright 2019 Texas Instruments Incorporated
%YAML 1.2
---
$id: "http://devicetree.org/schemas/display/ti/ti,k2g-dss.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"

title: Texas Instruments K2G Display Subsystem

maintainers:
  - Jyri Sarha <jsarha@ti.com>
  - Tomi Valkeinen <tomi.valkeinen@ti.com>

description: |
  The K2G DSS is an ultra-light version of TI Keystone Display
  SubSystem. It has only one output port and video plane. The
  output is DPI.

properties:
  compatible:
    const: ti,k2g-dss

  reg:
    items:
      - description: cfg DSS top level
      - description: common DISPC common
      - description: VID1 video plane 1
      - description: OVR1 overlay manager for vp1
      - description: VP1 video port 1

  reg-names:
    items:
      - const: cfg
      - const: common
      - const: vid1
      - const: ovr1
      - const: vp1

  clocks:
    items:
      - description: fck DSS functional clock
      - description: vp1 Video Port 1 pixel clock

  clock-names:
    items:
      - const: fck
      - const: vp1

  interrupts:
    maxItems: 1

  power-domains:
    maxItems: 1
    description: phandle to the associated power domain

  port:
    type: object
    description:
      Port as described in Documentation/devictree/bindings/graph.txt.
      The DSS DPI output port node

  max-memory-bandwidth:
    $ref: /schemas/types.yaml#/definitions/uint32
    description:
      Input memory (from main memory to dispc) bandwidth limit in
      bytes per second

required:
  - compatible
  - reg
  - reg-names
  - clocks
  - clock-names
  - interrupts
  - port

additionalProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/interrupt-controller/irq.h>

    dss: dss@02540000 {
            compatible = "ti,k2g-dss";
            reg =   <0x02540000 0x400>,
                    <0x02550000 0x1000>,
                    <0x02557000 0x1000>,
                    <0x0255a800 0x100>,
                    <0x0255ac00 0x100>;
            reg-names = "cfg", "common", "vid1", "ovr1", "vp1";
            clocks =        <&k2g_clks 0x2 0>,
                            <&k2g_clks 0x2 1>;
            clock-names = "fck", "vp1";
            interrupts = <GIC_SPI 247 IRQ_TYPE_EDGE_RISING>;

            power-domains = <&k2g_pds 0x2>;

            max-memory-bandwidth = <230000000>;

            port {
                    dpi_out: endpoint {
                            remote-endpoint = <&sii9022_in>;
                    };
            };
    };