Commit 9ac1fb15 authored by Rafael J. Wysocki's avatar Rafael J. Wysocki
Browse files

Merge branch 'cpufreq/arm/linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm 

Pull ARM cpufreq driver changes for v5.9-rc1 from Viresh Kumar:

"Here are the details:

- Adaptive voltage scaling (AVS) support and minor cleanups for
  brcmstb driver (Florian Fainelli and Markus Mayer).

- A new tegra driver and cleanup for the existing one (Sumit Gupta and
  Jon Hunter).

- Bandwidth level support for Qcom driver along with OPP changes (Sibi
  Sankar).

- Cleanups to sti, cpufreq-dt, ap806, CPPC drivers (Viresh Kumar, Lee
  Jones, Ivan Kokshaysky, Sven Auhagen, and Xin Hao).

- Make schedutil default governor for ARM (Valentin Schneider).

- Fix dependency issues for imx (Walter Lozano).

- Cleanup around cached_resolved_idx in cpufreq core (Viresh Kumar)."

* 'cpufreq/arm/linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm:
  cpufreq: make schedutil the default for arm and arm64
  cpufreq: cached_resolved_idx can not be negative
  cpufreq: Add Tegra194 cpufreq driver
  dt-bindings: arm: Add NVIDIA Tegra194 CPU Complex binding
  cpufreq: imx: Select NVMEM_IMX_OCOTP
  cpufreq: sti-cpufreq: Fix some formatting and misspelling issues
  cpufreq: tegra186: Simplify probe return path
  cpufreq: CPPC: Reuse caps variable in few routines
  cpufreq: ap806: fix cpufreq driver needs ap cpu clk
  cpufreq: cppc: Reorder code and remove apply_hisi_workaround variable
  cpufreq: dt: fix oops on armada37xx
  cpufreq: brcmstb-avs-cpufreq: send S2_ENTER / S2_EXIT commands to AVS
  cpufreq: brcmstb-avs-cpufreq: Support polling AVS firmware
  cpufreq: brcmstb-avs-cpufreq: more flexible interface for __issue_avs_command()
  cpufreq: qcom: Disable fast switch when scaling DDR/L3
  cpufreq: qcom: Update the bandwidth levels on frequency change
  OPP: Add and export helper to set bandwidth
  cpufreq: blacklist SC7180 in cpufreq-dt-platdev
  cpufreq: blacklist SDM845 in cpufreq-dt-platdev
parents 4daca379 f259eab3

Documentation/devicetree/bindings/arm/nvidia,tegra194-ccplex.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: "http://devicetree.org/schemas/arm/nvidia,tegra194-ccplex.yaml#"

$schema: "http://devicetree.org/meta-schemas/core.yaml#"



title: NVIDIA Tegra194 CPU Complex device tree bindings



maintainers:

  - Thierry Reding <thierry.reding@gmail.com>

  - Jonathan Hunter <jonathanh@nvidia.com>

  - Sumit Gupta <sumitg@nvidia.com>



description: |+

  Tegra194 SOC has homogeneous architecture where each cluster has two

  symmetric cores. Compatible string in "cpus" node represents the CPU

  Complex having all clusters.



properties:

  $nodename:

    const: cpus



  compatible:

    enum:

      - nvidia,tegra194-ccplex



  nvidia,bpmp:

    $ref: '/schemas/types.yaml#/definitions/phandle'

    description: |

      Specifies the bpmp node that needs to be queried to get

      operating point data for all CPUs.



examples:

  - |

    cpus {

      compatible = "nvidia,tegra194-ccplex";

      nvidia,bpmp = <&bpmp>;

      #address-cells = <1>;

      #size-cells = <0>;



      cpu0_0: cpu@0 {

        compatible = "nvidia,tegra194-carmel";

        device_type = "cpu";

        reg = <0x0>;

        enable-method = "psci";

      };



      cpu0_1: cpu@1 {

        compatible = "nvidia,tegra194-carmel";

        device_type = "cpu";

        reg = <0x001>;

        enable-method = "psci";

      };



      cpu1_0: cpu@100 {

        compatible = "nvidia,tegra194-carmel";

        device_type = "cpu";

        reg = <0x100>;

        enable-method = "psci";

      };



      cpu1_1: cpu@101 {

        compatible = "nvidia,tegra194-carmel";

        device_type = "cpu";

        reg = <0x101>;

        enable-method = "psci";

      };

    };

...

drivers/cpufreq/Kconfig

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@@ -37,7 +37,7 @@ config CPU_FREQ_STAT 
choice

	prompt "Default CPUFreq governor"

	default CPU_FREQ_DEFAULT_GOV_USERSPACE if ARM_SA1100_CPUFREQ || ARM_SA1110_CPUFREQ

	default CPU_FREQ_DEFAULT_GOV_SCHEDUTIL if BIG_LITTLE

	default CPU_FREQ_DEFAULT_GOV_SCHEDUTIL if ARM64 || ARM

	default CPU_FREQ_DEFAULT_GOV_SCHEDUTIL if X86_INTEL_PSTATE && SMP

	default CPU_FREQ_DEFAULT_GOV_PERFORMANCE

	help

drivers/cpufreq/Kconfig.arm

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@@ -41,6 +41,7 @@ config ARM_ARMADA_37XX_CPUFREQ 
config ARM_ARMADA_8K_CPUFREQ

	tristate "Armada 8K CPUFreq driver"

	depends on ARCH_MVEBU && CPUFREQ_DT

	select ARMADA_AP_CPU_CLK

	help

	  This enables the CPUFreq driver support for Marvell

	  Armada8k SOCs.
@@ -93,6 +94,7 @@ config ARM_IMX6Q_CPUFREQ 
	tristate "Freescale i.MX6 cpufreq support"

	depends on ARCH_MXC

	depends on REGULATOR_ANATOP

	select NVMEM_IMX_OCOTP

	select PM_OPP

	help

	  This adds cpufreq driver support for Freescale i.MX6 series SoCs.
@@ -314,6 +316,13 @@ config ARM_TEGRA186_CPUFREQ 
	help

	  This adds the CPUFreq driver support for Tegra186 SOCs.



config ARM_TEGRA194_CPUFREQ

	tristate "Tegra194 CPUFreq support"

	depends on ARCH_TEGRA_194_SOC && TEGRA_BPMP

	default y

	help

	  This adds CPU frequency driver support for Tegra194 SOCs.



config ARM_TI_CPUFREQ

	bool "Texas Instruments CPUFreq support"

	depends on ARCH_OMAP2PLUS

drivers/cpufreq/Makefile

+1 −0
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@@ -83,6 +83,7 @@ obj-$(CONFIG_ARM_TANGO_CPUFREQ) += tango-cpufreq.o 
obj-$(CONFIG_ARM_TEGRA20_CPUFREQ)	+= tegra20-cpufreq.o

obj-$(CONFIG_ARM_TEGRA124_CPUFREQ)	+= tegra124-cpufreq.o

obj-$(CONFIG_ARM_TEGRA186_CPUFREQ)	+= tegra186-cpufreq.o

obj-$(CONFIG_ARM_TEGRA194_CPUFREQ)	+= tegra194-cpufreq.o

obj-$(CONFIG_ARM_TI_CPUFREQ)		+= ti-cpufreq.o

obj-$(CONFIG_ARM_VEXPRESS_SPC_CPUFREQ)	+= vexpress-spc-cpufreq.o

drivers/cpufreq/armada-37xx-cpufreq.c

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@@ -456,6 +456,7 @@ static int __init armada37xx_cpufreq_driver_init(void) 
	/* Now that everything is setup, enable the DVFS at hardware level */

	armada37xx_cpufreq_enable_dvfs(nb_pm_base);



	memset(&pdata, 0, sizeof(pdata));

	pdata.suspend = armada37xx_cpufreq_suspend;

	pdata.resume = armada37xx_cpufreq_resume;

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