Commit 99edb18b authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'amd-drm-fixes-5.6-2020-02-19' of... 

Merge tag 'amd-drm-fixes-5.6-2020-02-19' of git://people.freedesktop.org/~agd5f/linux

 into drm-fixes

amd-drm-fixes-5.6-2020-02-19:

amdgpu:
- HDCP fixes
- xclk fix for raven
- GFXOFF fixes

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200219173954.3847-1-alexander.deucher@amd.com
parents 11a48a5a 6c62ce80

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c

+25 −1
Original line number Diff line number Diff line
@@ -1013,6 +1013,30 @@ static int psp_dtm_initialize(struct psp_context *psp) 
	return 0;

}



static int psp_dtm_unload(struct psp_context *psp)

{

	int ret;

	struct psp_gfx_cmd_resp *cmd;



	/*

	 * TODO: bypass the unloading in sriov for now

	 */

	if (amdgpu_sriov_vf(psp->adev))

		return 0;



	cmd = kzalloc(sizeof(struct psp_gfx_cmd_resp), GFP_KERNEL);

	if (!cmd)

		return -ENOMEM;



	psp_prep_ta_unload_cmd_buf(cmd, psp->dtm_context.session_id);



	ret = psp_cmd_submit_buf(psp, NULL, cmd, psp->fence_buf_mc_addr);



	kfree(cmd);



	return ret;

}



int psp_dtm_invoke(struct psp_context *psp, uint32_t ta_cmd_id)

{

	/*
@@ -1037,7 +1061,7 @@ static int psp_dtm_terminate(struct psp_context *psp) 
	if (!psp->dtm_context.dtm_initialized)

		return 0;



	ret = psp_hdcp_unload(psp);

	ret = psp_dtm_unload(psp);

	if (ret)

		return ret;

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c

+2 −0
Original line number Diff line number Diff line
@@ -3923,11 +3923,13 @@ static uint64_t gfx_v10_0_get_gpu_clock_counter(struct amdgpu_device *adev) 
{

	uint64_t clock;



	amdgpu_gfx_off_ctrl(adev, false);

	mutex_lock(&adev->gfx.gpu_clock_mutex);

	WREG32_SOC15(GC, 0, mmRLC_CAPTURE_GPU_CLOCK_COUNT, 1);

	clock = (uint64_t)RREG32_SOC15(GC, 0, mmRLC_GPU_CLOCK_COUNT_LSB) |

		((uint64_t)RREG32_SOC15(GC, 0, mmRLC_GPU_CLOCK_COUNT_MSB) << 32ULL);

	mutex_unlock(&adev->gfx.gpu_clock_mutex);

	amdgpu_gfx_off_ctrl(adev, true);

	return clock;

}

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

+11 −2
Original line number Diff line number Diff line
@@ -1193,6 +1193,14 @@ static bool gfx_v9_0_should_disable_gfxoff(struct pci_dev *pdev) 
	return false;

}



static bool is_raven_kicker(struct amdgpu_device *adev)

{

	if (adev->pm.fw_version >= 0x41e2b)

		return true;

	else

		return false;

}



static void gfx_v9_0_check_if_need_gfxoff(struct amdgpu_device *adev)

{

	if (gfx_v9_0_should_disable_gfxoff(adev->pdev))
@@ -1205,9 +1213,8 @@ static void gfx_v9_0_check_if_need_gfxoff(struct amdgpu_device *adev) 
		break;

	case CHIP_RAVEN:

		if (!(adev->rev_id >= 0x8 || adev->pdev->device == 0x15d8) &&

		    ((adev->gfx.rlc_fw_version != 106 &&

		    ((!is_raven_kicker(adev) &&

		      adev->gfx.rlc_fw_version < 531) ||

		     (adev->gfx.rlc_fw_version == 53815) ||

		     (adev->gfx.rlc_feature_version < 1) ||

		     !adev->gfx.rlc.is_rlc_v2_1))

			adev->pm.pp_feature &= ~PP_GFXOFF_MASK;
@@ -3959,6 +3966,7 @@ static uint64_t gfx_v9_0_get_gpu_clock_counter(struct amdgpu_device *adev) 
{

	uint64_t clock;



	amdgpu_gfx_off_ctrl(adev, false);

	mutex_lock(&adev->gfx.gpu_clock_mutex);

	if (adev->asic_type == CHIP_VEGA10 && amdgpu_sriov_runtime(adev)) {

		uint32_t tmp, lsb, msb, i = 0;
@@ -3977,6 +3985,7 @@ static uint64_t gfx_v9_0_get_gpu_clock_counter(struct amdgpu_device *adev) 
			((uint64_t)RREG32_SOC15(GC, 0, mmRLC_GPU_CLOCK_COUNT_MSB) << 32ULL);

	}

	mutex_unlock(&adev->gfx.gpu_clock_mutex);

	amdgpu_gfx_off_ctrl(adev, true);

	return clock;

}

drivers/gpu/drm/amd/amdgpu/soc15.c

+6 −1
Original line number Diff line number Diff line
@@ -272,7 +272,12 @@ static u32 soc15_get_config_memsize(struct amdgpu_device *adev) 


static u32 soc15_get_xclk(struct amdgpu_device *adev)

{

	return adev->clock.spll.reference_freq;

	u32 reference_clock = adev->clock.spll.reference_freq;



	if (adev->asic_type == CHIP_RAVEN)

		return reference_clock / 4;



	return reference_clock;

}

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

+6 −4
Original line number Diff line number Diff line
@@ -1911,7 +1911,7 @@ static void handle_hpd_irq(void *param) 
	mutex_lock(&aconnector->hpd_lock);



#ifdef CONFIG_DRM_AMD_DC_HDCP

	if (adev->asic_type >= CHIP_RAVEN)

	if (adev->dm.hdcp_workqueue)

		hdcp_reset_display(adev->dm.hdcp_workqueue, aconnector->dc_link->link_index);

#endif

	if (aconnector->fake_enable)
@@ -2088,8 +2088,10 @@ static void handle_hpd_rx_irq(void *param) 
		}

	}

#ifdef CONFIG_DRM_AMD_DC_HDCP

	if (hpd_irq_data.bytes.device_service_irq.bits.CP_IRQ)

	    if (hpd_irq_data.bytes.device_service_irq.bits.CP_IRQ) {

		    if (adev->dm.hdcp_workqueue)

			    hdcp_handle_cpirq(adev->dm.hdcp_workqueue,  aconnector->base.index);

	    }

#endif

	if ((dc_link->cur_link_settings.lane_count != LANE_COUNT_UNKNOWN) ||

	    (dc_link->type == dc_connection_mst_branch))
@@ -5702,7 +5704,7 @@ void amdgpu_dm_connector_init_helper(struct amdgpu_display_manager *dm, 
		drm_connector_attach_vrr_capable_property(

			&aconnector->base);

#ifdef CONFIG_DRM_AMD_DC_HDCP

		if (adev->asic_type >= CHIP_RAVEN)

		if (adev->dm.hdcp_workqueue)

			drm_connector_attach_content_protection_property(&aconnector->base, true);

#endif

	}

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