Commit 99dc26bd authored by Ingo Molnar's avatar Ingo Molnar
Browse files

x86/fpu: Remove struct fpu::fpregs_active 

The previous changes paved the way for the removal of the
fpu::fpregs_active state flag - we now only have the
fpu::fpstate_active and fpu::last_cpu fields left.

Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Eric Biggers <ebiggers3@gmail.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Rik van Riel <riel@redhat.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Yu-cheng Yu <yu-cheng.yu@intel.com>
Link: http://lkml.kernel.org/r/20170923130016.21448-21-mingo@kernel.org


Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent 6cf4edbe

arch/x86/include/asm/fpu/internal.h

+0 −5
Original line number Diff line number Diff line
@@ -526,14 +526,12 @@ static inline int fpregs_state_valid(struct fpu *fpu, unsigned int cpu) 
 */

static inline void fpregs_deactivate(struct fpu *fpu)

{

	fpu->fpregs_active = 0;

	this_cpu_write(fpu_fpregs_owner_ctx, NULL);

	trace_x86_fpu_regs_deactivated(fpu);

}



static inline void fpregs_activate(struct fpu *fpu)

{

	fpu->fpregs_active = 1;

	this_cpu_write(fpu_fpregs_owner_ctx, fpu);

	trace_x86_fpu_regs_activated(fpu);

}
@@ -552,8 +550,6 @@ static inline void fpregs_activate(struct fpu *fpu) 
static inline void

switch_fpu_prepare(struct fpu *old_fpu, int cpu)

{

	WARN_ON_FPU(old_fpu->fpregs_active != old_fpu->fpstate_active);



	if (old_fpu->fpstate_active) {

		if (!copy_fpregs_to_fpstate(old_fpu))

			old_fpu->last_cpu = -1;
@@ -561,7 +557,6 @@ switch_fpu_prepare(struct fpu *old_fpu, int cpu) 
			old_fpu->last_cpu = cpu;



		/* But leave fpu_fpregs_owner_ctx! */

		old_fpu->fpregs_active = 0;

		trace_x86_fpu_regs_deactivated(old_fpu);

	} else

		old_fpu->last_cpu = -1;

arch/x86/include/asm/fpu/types.h

+0 −23
Original line number Diff line number Diff line
@@ -298,29 +298,6 @@ struct fpu { 
	 */

	unsigned char			fpstate_active;



	/*

	 * @fpregs_active:

	 *

	 * This flag determines whether a given context is actively

	 * loaded into the FPU's registers and that those registers

	 * represent the task's current FPU state.

	 *

	 * Note the interaction with fpstate_active:

	 *

	 *   # task does not use the FPU:

	 *   fpstate_active == 0

	 *

	 *   # task uses the FPU and regs are active:

	 *   fpstate_active == 1 && fpregs_active == 1

	 *

	 *   # the regs are inactive but still match fpstate:

	 *   fpstate_active == 1 && fpregs_active == 0 && fpregs_owner == fpu

	 *

	 * The third state is what we use for the lazy restore optimization

	 * on lazy-switching CPUs.

	 */

	unsigned char			fpregs_active;



	/*

	 * @state:

	 *

arch/x86/include/asm/trace/fpu.h

+1 −4
Original line number Diff line number Diff line
@@ -12,7 +12,6 @@ DECLARE_EVENT_CLASS(x86_fpu, 


	TP_STRUCT__entry(

		__field(struct fpu *, fpu)

		__field(bool, fpregs_active)

		__field(bool, fpstate_active)

		__field(u64, xfeatures)

		__field(u64, xcomp_bv)
@@ -20,16 +19,14 @@ DECLARE_EVENT_CLASS(x86_fpu, 


	TP_fast_assign(

		__entry->fpu		= fpu;

		__entry->fpregs_active	= fpu->fpregs_active;

		__entry->fpstate_active	= fpu->fpstate_active;

		if (boot_cpu_has(X86_FEATURE_OSXSAVE)) {

			__entry->xfeatures = fpu->state.xsave.header.xfeatures;

			__entry->xcomp_bv  = fpu->state.xsave.header.xcomp_bv;

		}

	),

	TP_printk("x86/fpu: %p fpregs_active: %d fpstate_active: %d xfeatures: %llx xcomp_bv: %llx",

	TP_printk("x86/fpu: %p fpstate_active: %d xfeatures: %llx xcomp_bv: %llx",

			__entry->fpu,

			__entry->fpregs_active,

			__entry->fpstate_active,

			__entry->xfeatures,

			__entry->xcomp_bv

arch/x86/kernel/fpu/core.c

+0 −9
Original line number Diff line number Diff line
@@ -147,8 +147,6 @@ void fpu__save(struct fpu *fpu) 
	WARN_ON_FPU(fpu != &current->thread.fpu);



	preempt_disable();

	WARN_ON_FPU(fpu->fpstate_active != fpu->fpregs_active);



	trace_x86_fpu_before_save(fpu);

	if (fpu->fpstate_active) {

		if (!copy_fpregs_to_fpstate(fpu)) {
@@ -191,7 +189,6 @@ EXPORT_SYMBOL_GPL(fpstate_init); 


int fpu__copy(struct fpu *dst_fpu, struct fpu *src_fpu)

{

	dst_fpu->fpregs_active = 0;

	dst_fpu->last_cpu = -1;



	if (!src_fpu->fpstate_active || !static_cpu_has(X86_FEATURE_FPU))
@@ -264,7 +261,6 @@ EXPORT_SYMBOL_GPL(fpu__activate_curr); 
 */

void fpu__activate_fpstate_read(struct fpu *fpu)

{

	WARN_ON_FPU(fpu->fpstate_active != fpu->fpregs_active);

	/*

	 * If fpregs are active (in the current CPU), then

	 * copy them to the fpstate:
@@ -365,7 +361,6 @@ void fpu__current_fpstate_write_end(void) 
{

	struct fpu *fpu = &current->thread.fpu;



	WARN_ON_FPU(fpu->fpstate_active != fpu->fpregs_active);

	/*

	 * 'fpu' now has an updated copy of the state, but the

	 * registers may still be out of date.  Update them with
@@ -419,8 +414,6 @@ void fpu__drop(struct fpu *fpu) 
	preempt_disable();



	if (fpu == &current->thread.fpu) {

		WARN_ON_FPU(fpu->fpstate_active != fpu->fpregs_active);



		if (fpu->fpstate_active) {

			/* Ignore delayed exceptions from user space */

			asm volatile("1: fwait\n"
@@ -428,8 +421,6 @@ void fpu__drop(struct fpu *fpu) 
				     _ASM_EXTABLE(1b, 2b));

			fpregs_deactivate(fpu);

		}

	} else {

		WARN_ON_FPU(fpu->fpregs_active);

	}



	fpu->fpstate_active = 0;

arch/x86/kernel/fpu/signal.c

+0 −2
Original line number Diff line number Diff line
@@ -171,8 +171,6 @@ int copy_fpstate_to_sigframe(void __user *buf, void __user *buf_fx, int size) 
			sizeof(struct user_i387_ia32_struct), NULL,

			(struct _fpstate_32 __user *) buf) ? -1 : 1;



	WARN_ON_FPU(fpu->fpstate_active != fpu->fpregs_active);



	if (fpu->fpstate_active || using_compacted_format()) {

		/* Save the live register state to the user directly. */

		if (copy_fpregs_to_sigframe(buf_fx))

CRA Git | Maintained and supported by SUSTech CRA and CCSE