Commit 99bc73ec authored by Pankaj Bharadiya's avatar Pankaj Bharadiya Committed by Jani Nikula
Browse files

drm/i915/display/dpll_mgr: Make WARN* drm specific where drm_device ptr is available 



drm specific WARN* calls include device information in the
backtrace, so we know what device the warnings originate from.

Covert all the calls of WARN* with device specific drm_WARN*
variants in functions where drm_device or drm_i915_private struct
pointer is readily available.

The conversion was done automatically with below coccinelle semantic
patch. checkpatch errors/warnings are fixed manually.

@rule1@
identifier func, T;
@@
func(...) {
...
struct drm_device *T = ...;
<...
(
-WARN(
+drm_WARN(T,
...)
|
-WARN_ON(
+drm_WARN_ON(T,
...)
|
-WARN_ONCE(
+drm_WARN_ONCE(T,
...)
|
-WARN_ON_ONCE(
+drm_WARN_ON_ONCE(T,
...)
)
...>
}

@rule2@
identifier func, T;
@@
func(struct drm_device *T,...) {
<...
(
-WARN(
+drm_WARN(T,
...)
|
-WARN_ON(
+drm_WARN_ON(T,
...)
|
-WARN_ONCE(
+drm_WARN_ONCE(T,
...)
|
-WARN_ON_ONCE(
+drm_WARN_ON_ONCE(T,
...)
)
...>
}

@rule3@
identifier func, T;
@@
func(...) {
...
struct drm_i915_private *T = ...;
<+...
(
-WARN(
+drm_WARN(&T->drm,
...)
|
-WARN_ON(
+drm_WARN_ON(&T->drm,
...)
|
-WARN_ONCE(
+drm_WARN_ONCE(&T->drm,
...)
|
-WARN_ON_ONCE(
+drm_WARN_ON_ONCE(&T->drm,
...)
)
...+>
}

@rule4@
identifier func, T;
@@
func(struct drm_i915_private *T,...) {
<+...
(
-WARN(
+drm_WARN(&T->drm,
...)
|
-WARN_ON(
+drm_WARN_ON(&T->drm,
...)
|
-WARN_ONCE(
+drm_WARN_ONCE(&T->drm,
...)
|
-WARN_ON_ONCE(
+drm_WARN_ON_ONCE(&T->drm,
...)
)
...+>
}

Signed-off-by: default avatarPankaj Bharadiya <pankaj.laxminarayan.bharadiya@intel.com>
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200128181603.27767-10-pankaj.laxminarayan.bharadiya@intel.com
parent 8faa7251

drivers/gpu/drm/i915/display/intel_dpll_mgr.c

+19 −18
Original line number Diff line number Diff line
@@ -103,7 +103,7 @@ enum intel_dpll_id 
intel_get_shared_dpll_id(struct drm_i915_private *dev_priv,

			 struct intel_shared_dpll *pll)

{

	if (WARN_ON(pll < dev_priv->shared_dplls||

	if (drm_WARN_ON(&dev_priv->drm, pll < dev_priv->shared_dplls ||

			pll > &dev_priv->shared_dplls[dev_priv->num_shared_dpll]))

		return -1;
@@ -118,7 +118,8 @@ void assert_shared_dpll(struct drm_i915_private *dev_priv, 
	bool cur_state;

	struct intel_dpll_hw_state hw_state;



	if (WARN(!pll, "asserting DPLL %s with no DPLL\n", onoff(state)))

	if (drm_WARN(&dev_priv->drm, !pll,

		     "asserting DPLL %s with no DPLL\n", onoff(state)))

		return;



	cur_state = pll->info->funcs->get_hw_state(dev_priv, pll, &hw_state);
@@ -140,14 +141,14 @@ void intel_prepare_shared_dpll(const struct intel_crtc_state *crtc_state) 
	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);

	struct intel_shared_dpll *pll = crtc_state->shared_dpll;



	if (WARN_ON(pll == NULL))

	if (drm_WARN_ON(&dev_priv->drm, pll == NULL))

		return;



	mutex_lock(&dev_priv->dpll_lock);

	WARN_ON(!pll->state.crtc_mask);

	drm_WARN_ON(&dev_priv->drm, !pll->state.crtc_mask);

	if (!pll->active_mask) {

		DRM_DEBUG_DRIVER("setting up %s\n", pll->info->name);

		WARN_ON(pll->on);

		drm_WARN_ON(&dev_priv->drm, pll->on);

		assert_shared_dpll_disabled(dev_priv, pll);



		pll->info->funcs->prepare(dev_priv, pll);
@@ -169,14 +170,14 @@ void intel_enable_shared_dpll(const struct intel_crtc_state *crtc_state) 
	unsigned int crtc_mask = drm_crtc_mask(&crtc->base);

	unsigned int old_mask;



	if (WARN_ON(pll == NULL))

	if (drm_WARN_ON(&dev_priv->drm, pll == NULL))

		return;



	mutex_lock(&dev_priv->dpll_lock);

	old_mask = pll->active_mask;



	if (WARN_ON(!(pll->state.crtc_mask & crtc_mask)) ||

	    WARN_ON(pll->active_mask & crtc_mask))

	if (drm_WARN_ON(&dev_priv->drm, !(pll->state.crtc_mask & crtc_mask)) ||

	    drm_WARN_ON(&dev_priv->drm, pll->active_mask & crtc_mask))

		goto out;



	pll->active_mask |= crtc_mask;
@@ -186,11 +187,11 @@ void intel_enable_shared_dpll(const struct intel_crtc_state *crtc_state) 
		      crtc->base.base.id);



	if (old_mask) {

		WARN_ON(!pll->on);

		drm_WARN_ON(&dev_priv->drm, !pll->on);

		assert_shared_dpll_enabled(dev_priv, pll);

		goto out;

	}

	WARN_ON(pll->on);

	drm_WARN_ON(&dev_priv->drm, pll->on);



	DRM_DEBUG_KMS("enabling %s\n", pll->info->name);

	pll->info->funcs->enable(dev_priv, pll);
@@ -221,7 +222,7 @@ void intel_disable_shared_dpll(const struct intel_crtc_state *crtc_state) 
		return;



	mutex_lock(&dev_priv->dpll_lock);

	if (WARN_ON(!(pll->active_mask & crtc_mask)))

	if (drm_WARN_ON(&dev_priv->drm, !(pll->active_mask & crtc_mask)))

		goto out;



	DRM_DEBUG_KMS("disable %s (active %x, on? %d) for crtc %d\n",
@@ -229,7 +230,7 @@ void intel_disable_shared_dpll(const struct intel_crtc_state *crtc_state) 
		      crtc->base.base.id);



	assert_shared_dpll_enabled(dev_priv, pll);

	WARN_ON(!pll->on);

	drm_WARN_ON(&dev_priv->drm, !pll->on);



	pll->active_mask &= ~crtc_mask;

	if (pll->active_mask)
@@ -256,7 +257,7 @@ intel_find_shared_dpll(struct intel_atomic_state *state, 


	shared_dpll = intel_atomic_get_shared_dpll_state(&state->base);



	WARN_ON(dpll_mask & ~(BIT(I915_NUM_PLLS) - 1));

	drm_WARN_ON(&dev_priv->drm, dpll_mask & ~(BIT(I915_NUM_PLLS) - 1));



	for_each_set_bit(i, &dpll_mask, I915_NUM_PLLS) {

		pll = &dev_priv->shared_dplls[i];
@@ -1100,7 +1101,7 @@ static bool skl_ddi_dpll0_get_hw_state(struct drm_i915_private *dev_priv, 


	/* DPLL0 is always enabled since it drives CDCLK */

	val = intel_de_read(dev_priv, regs[id].ctl);

	if (WARN_ON(!(val & LCPLL_PLL_ENABLE)))

	if (drm_WARN_ON(&dev_priv->drm, !(val & LCPLL_PLL_ENABLE)))

		goto out;



	val = intel_de_read(dev_priv, DPLL_CTRL1);
@@ -3791,7 +3792,7 @@ void intel_shared_dpll_init(struct drm_device *dev) 
	dpll_info = dpll_mgr->dpll_info;



	for (i = 0; dpll_info[i].name; i++) {

		WARN_ON(i != dpll_info[i].id);

		drm_WARN_ON(dev, i != dpll_info[i].id);

		dev_priv->shared_dplls[i].info = &dpll_info[i];

	}
@@ -3828,7 +3829,7 @@ bool intel_reserve_shared_dplls(struct intel_atomic_state *state, 
	struct drm_i915_private *dev_priv = to_i915(state->base.dev);

	const struct intel_dpll_mgr *dpll_mgr = dev_priv->dpll_mgr;



	if (WARN_ON(!dpll_mgr))

	if (drm_WARN_ON(&dev_priv->drm, !dpll_mgr))

		return false;



	return dpll_mgr->get_dplls(state, crtc, encoder);
@@ -3880,7 +3881,7 @@ void intel_update_active_dpll(struct intel_atomic_state *state, 
	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);

	const struct intel_dpll_mgr *dpll_mgr = dev_priv->dpll_mgr;



	if (WARN_ON(!dpll_mgr))

	if (drm_WARN_ON(&dev_priv->drm, !dpll_mgr))

		return;



	dpll_mgr->update_active_dpll(state, crtc, encoder);

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