Commit 99a0d9f5 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'gpio-v5.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio 

Pull GPIO updates from Linus Walleij:
 "This is the bulk of GPIO changes for the v5.5 kernel cycle

  Core changes:

   - Expose pull up/down flags for the GPIO character device to
     userspace.

     After clear input from the RaspberryPi and Beagle communities, it
     has been established that prototyping, industrial automation and
     make communities strongly need this feature, and as we want people
     to use the character device, we have implemented the simple pull
     up/down interface for GPIO lines.

     This means we can specify that a (chip-specific) pull up/down
     resistor can be enabled, but does not offer fine-grained control
     such as cases where the resistance of the same pull resistor can be
     controlled (yet).

   - Introduce devm_fwnode_gpiod_get_index() and start to phase out the
     old symbol devm_fwnode_get_index_gpiod_from_child().

   - A bit of documentation clean-up work.

   - Introduce a define for GPIO line directions and deploy it in all
     GPIO drivers in the drivers/gpio directory.

   - Add a special callback to populate pin ranges when cooperating with
     the pin control subsystem and registering ranges as part of adding
     a gpiolib driver and a gpio_irq_chip driver at the same time. This
     is also deployed in the Intel Merrifield driver.

  New drivers:

   - RDA Micro GPIO controller.

   - XGS-iproc GPIO driver.

  Driver improvements:

   - Wake event and debounce support on the Tegra 186 driver.

   - Finalize the Aspeed SGPIO driver.

   - MPC8xxx uses a normal IRQ handler rather than a chained handler"

* tag 'gpio-v5.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (64 commits)
  gpio: Add TODO item for regmap helper
  Documentation: gpio: driver.rst: Fix warnings
  gpio: of: Fix bogus reference to gpiod_get_count()
  gpiolib: Grammar s/manager/managed/
  gpio: lynxpoint: Setup correct IRQ handlers
  MAINTAINERS: Replace my email by one @kernel.org
  gpiolib: acpi: Make acpi_gpiochip_alloc_event always return AE_OK
  gpio/mpc8xxx: fix qoriq GPIO reading
  gpio: mpc8xxx: Don't overwrite default irq_set_type callback
  gpiolib: acpi: Print pin number on acpi_gpiochip_alloc_event errors
  gpiolib: fix coding style in gpiod_hog()
  drm/bridge: ti-tfp410: switch to using fwnode_gpiod_get_index()
  gpio: merrifield: Pass irqchip when adding gpiochip
  gpio: merrifield: Add GPIO <-> pin mapping ranges via callback
  gpiolib: Introduce ->add_pin_ranges() callback
  gpio: mmio: remove untrue leftover comment
  gpio: em: Use platform_get_irq() to obtain interrupts
  gpio: tegra186: Add debounce support
  gpio: tegra186: Program interrupt route mapping
  gpio: tegra186: Derive register offsets from bank/port
  ...
parents 37323918 41c4616b

Documentation/devicetree/bindings/gpio/brcm,xgs-iproc-gpio.yaml

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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/gpio/brcm,xgs-iproc-gpio.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Broadcom XGS iProc GPIO controller



maintainers:

  - Chris Packham <chris.packham@alliedtelesis.co.nz>



description: |

  This controller is the Chip Common A GPIO present on a number of Broadcom

  switch ASICs with integrated SoCs.



properties:

  compatible:

    const: brcm,iproc-gpio-cca



  reg:

    items:

      - description: the I/O address containing the GPIO controller

                     registers.

      - description: the I/O address containing the Chip Common A interrupt

                     registers.



  gpio-controller: true



  '#gpio-cells':

      const: 2



  ngpios:

    minimum: 0

    maximum: 32



  interrupt-controller: true



  '#interrupt-cells':

    const: 2



  interrupts:

    maxItems: 1



required:

  - compatible

  - reg

  - "#gpio-cells"

  - gpio-controller



dependencies:

  interrupt-controller: [ interrupts ]



examples:

  - |

    #include <dt-bindings/interrupt-controller/irq.h>

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    gpio@18000060 {

        compatible = "brcm,iproc-gpio-cca";

        #gpio-cells = <2>;

        reg = <0x18000060 0x50>,

              <0x18000000 0x50>;

        ngpios = <12>;

        gpio-controller;

        interrupt-controller;

        #interrupt-cells = <2>;

        interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;

    };





...

Documentation/devicetree/bindings/gpio/gpio-rda.yaml

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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/gpio/gpio-rda.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: RDA Micro GPIO controller



maintainers:

  - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>



properties:

  compatible:

    const: rda,8810pl-gpio



  reg:

    maxItems: 1



  gpio-controller: true



  "#gpio-cells":

    const: 2



  ngpios:

    description:

      Number of available gpios in a bank.

    minimum: 1

    maximum: 32



  interrupt-controller: true



  "#interrupt-cells":

    const: 2



  interrupts:

    maxItems: 1



required:

  - compatible

  - reg

  - gpio-controller

  - "#gpio-cells"

  - ngpios

  - interrupt-controller

  - "#interrupt-cells"

  - interrupts



additionalProperties: false



...

Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt

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@@ -8,6 +8,7 @@ Required Properties: 
    - "renesas,gpio-r8a7745": for R8A7745 (RZ/G1E) compatible GPIO controller.

    - "renesas,gpio-r8a77470": for R8A77470 (RZ/G1C) compatible GPIO controller.

    - "renesas,gpio-r8a774a1": for R8A774A1 (RZ/G2M) compatible GPIO controller.

    - "renesas,gpio-r8a774b1": for R8A774B1 (RZ/G2N) compatible GPIO controller.

    - "renesas,gpio-r8a774c0": for R8A774C0 (RZ/G2E) compatible GPIO controller.

    - "renesas,gpio-r8a7778": for R8A7778 (R-Car M1) compatible GPIO controller.

    - "renesas,gpio-r8a7779": for R8A7779 (R-Car H1) compatible GPIO controller.

Documentation/driver-api/bt8xxgpio.rst→Documentation/driver-api/gpio/bt8xxgpio.rst

+1 −1
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@@ -2,7 +2,7 @@ 
A driver for a selfmade cheap BT8xx based PCI GPIO-card (bt8xxgpio)

===================================================================



For advanced documentation, see http://www.bu3sch.de/btgpio.php

For advanced documentation, see https://bues.ch/cms/unmaintained/btgpio.html



A generic digital 24-port PCI GPIO card can be built out of an ordinary

Brooktree bt848, bt849, bt878 or bt879 based analog TV tuner card. The

Documentation/driver-api/gpio/driver.rst

+16 −9
Original line number Diff line number Diff line
@@ -5,7 +5,7 @@ GPIO Driver Interface 
This document serves as a guide for writers of GPIO chip drivers.



Each GPIO controller driver needs to include the following header, which defines

the structures used to define a GPIO driver:

the structures used to define a GPIO driver::



	#include <linux/gpio/driver.h>
@@ -398,12 +398,15 @@ provided. A big portion of overhead code will be managed by gpiolib, 
under the assumption that your interrupts are 1-to-1-mapped to the

GPIO line index:



  GPIO line offset   Hardware IRQ

  0                  0

  1                  1

  2                  2

  ...                ...

  ngpio-1            ngpio-1

.. csv-table::

    :header: GPIO line offset, Hardware IRQ



    0,0

    1,1

    2,2

    ...,...

    ngpio-1, ngpio-1





If some GPIO lines do not have corresponding IRQs, the bitmask valid_mask

and the flag need_valid_mask in gpio_irq_chip can be used to mask off some
@@ -413,7 +416,9 @@ The preferred way to set up the helpers is to fill in the 
struct gpio_irq_chip inside struct gpio_chip before adding the gpio_chip.

If you do this, the additional irq_chip will be set up by gpiolib at the

same time as setting up the rest of the GPIO functionality. The following

is a typical example of a cascaded interrupt handler using gpio_irq_chip:

is a typical example of a cascaded interrupt handler using gpio_irq_chip::



.. code-block:: c



  /* Typical state container with dynamic irqchip */

  struct my_gpio {
@@ -448,7 +453,9 @@ is a typical example of a cascaded interrupt handler using gpio_irq_chip: 
  return devm_gpiochip_add_data(dev, &g->gc, g);



The helper support using hierarchical interrupt controllers as well.

In this case the typical set-up will look like this:

In this case the typical set-up will look like this::



.. code-block:: c



  /* Typical state container with dynamic irqchip */

  struct my_gpio {

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