Commit 995c376e authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'mullins' of git://people.freedesktop.org/~deathsimple/linux into drm-fixes 

Add Mullins chips support.

* 'mullins' of git://people.freedesktop.org/~deathsimple/linux:
  drm/radeon: add pci ids for Mullins
  drm/radeon: add Mullins VCE support
  drm/radeon: modesetting updates for Mullins.
  drm/radeon: dpm updates for KV/KB
  drm/radeon: add Mullins dpm support.
  drm/radeon: add Mullins UVD support.
  drm/radeon: update cik init for Mullins.
  drm/radeon: add Mullins chip family
parents 2a1235e5 573471c1

drivers/gpu/drm/radeon/atombios_crtc.c

+3 −2
Original line number Diff line number Diff line
@@ -1736,8 +1736,9 @@ static int radeon_atom_pick_pll(struct drm_crtc *crtc) 
		}

		/* otherwise, pick one of the plls */

		if ((rdev->family == CHIP_KAVERI) ||

		    (rdev->family == CHIP_KABINI)) {

			/* KB/KV has PPLL1 and PPLL2 */

		    (rdev->family == CHIP_KABINI) ||

		    (rdev->family == CHIP_MULLINS)) {

			/* KB/KV/ML has PPLL1 and PPLL2 */

			pll_in_use = radeon_get_pll_use_mask(crtc);

			if (!(pll_in_use & (1 << ATOM_PPLL2)))

				return ATOM_PPLL2;

drivers/gpu/drm/radeon/cik.c

+71 −0
Original line number Diff line number Diff line
@@ -63,6 +63,12 @@ MODULE_FIRMWARE("radeon/KABINI_ce.bin"); 
MODULE_FIRMWARE("radeon/KABINI_mec.bin");

MODULE_FIRMWARE("radeon/KABINI_rlc.bin");

MODULE_FIRMWARE("radeon/KABINI_sdma.bin");

MODULE_FIRMWARE("radeon/MULLINS_pfp.bin");

MODULE_FIRMWARE("radeon/MULLINS_me.bin");

MODULE_FIRMWARE("radeon/MULLINS_ce.bin");

MODULE_FIRMWARE("radeon/MULLINS_mec.bin");

MODULE_FIRMWARE("radeon/MULLINS_rlc.bin");

MODULE_FIRMWARE("radeon/MULLINS_sdma.bin");



extern int r600_ih_ring_alloc(struct radeon_device *rdev);

extern void r600_ih_ring_fini(struct radeon_device *rdev);
@@ -1473,6 +1479,43 @@ static const u32 hawaii_mgcg_cgcg_init[] = 
	0xd80c, 0xff000ff0, 0x00000100

};



static const u32 godavari_golden_registers[] =

{

	0x55e4, 0xff607fff, 0xfc000100,

	0x6ed8, 0x00010101, 0x00010000,

	0x9830, 0xffffffff, 0x00000000,

	0x98302, 0xf00fffff, 0x00000400,

	0x6130, 0xffffffff, 0x00010000,

	0x5bb0, 0x000000f0, 0x00000070,

	0x5bc0, 0xf0311fff, 0x80300000,

	0x98f8, 0x73773777, 0x12010001,

	0x98fc, 0xffffffff, 0x00000010,

	0x8030, 0x00001f0f, 0x0000100a,

	0x2f48, 0x73773777, 0x12010001,

	0x2408, 0x000fffff, 0x000c007f,

	0x8a14, 0xf000003f, 0x00000007,

	0x8b24, 0xffffffff, 0x00ff0fff,

	0x30a04, 0x0000ff0f, 0x00000000,

	0x28a4c, 0x07ffffff, 0x06000000,

	0x4d8, 0x00000fff, 0x00000100,

	0xd014, 0x00010000, 0x00810001,

	0xd814, 0x00010000, 0x00810001,

	0x3e78, 0x00000001, 0x00000002,

	0xc768, 0x00000008, 0x00000008,

	0xc770, 0x00000f00, 0x00000800,

	0xc774, 0x00000f00, 0x00000800,

	0xc798, 0x00ffffff, 0x00ff7fbf,

	0xc79c, 0x00ffffff, 0x00ff7faf,

	0x8c00, 0x000000ff, 0x00000001,

	0x214f8, 0x01ff01ff, 0x00000002,

	0x21498, 0x007ff800, 0x00200000,

	0x2015c, 0xffffffff, 0x00000f40,

	0x88c4, 0x001f3ae3, 0x00000082,

	0x88d4, 0x0000001f, 0x00000010,

	0x30934, 0xffffffff, 0x00000000

};





static void cik_init_golden_registers(struct radeon_device *rdev)

{

	switch (rdev->family) {
@@ -1504,6 +1547,20 @@ static void cik_init_golden_registers(struct radeon_device *rdev) 
						 kalindi_golden_spm_registers,

						 (const u32)ARRAY_SIZE(kalindi_golden_spm_registers));

		break;

	case CHIP_MULLINS:

		radeon_program_register_sequence(rdev,

						 kalindi_mgcg_cgcg_init,

						 (const u32)ARRAY_SIZE(kalindi_mgcg_cgcg_init));

		radeon_program_register_sequence(rdev,

						 godavari_golden_registers,

						 (const u32)ARRAY_SIZE(godavari_golden_registers));

		radeon_program_register_sequence(rdev,

						 kalindi_golden_common_registers,

						 (const u32)ARRAY_SIZE(kalindi_golden_common_registers));

		radeon_program_register_sequence(rdev,

						 kalindi_golden_spm_registers,

						 (const u32)ARRAY_SIZE(kalindi_golden_spm_registers));

		break;

	case CHIP_KAVERI:

		radeon_program_register_sequence(rdev,

						 spectre_mgcg_cgcg_init,
@@ -1834,6 +1891,15 @@ static int cik_init_microcode(struct radeon_device *rdev) 
		rlc_req_size = KB_RLC_UCODE_SIZE * 4;

		sdma_req_size = CIK_SDMA_UCODE_SIZE * 4;

		break;

	case CHIP_MULLINS:

		chip_name = "MULLINS";

		pfp_req_size = CIK_PFP_UCODE_SIZE * 4;

		me_req_size = CIK_ME_UCODE_SIZE * 4;

		ce_req_size = CIK_CE_UCODE_SIZE * 4;

		mec_req_size = CIK_MEC_UCODE_SIZE * 4;

		rlc_req_size = ML_RLC_UCODE_SIZE * 4;

		sdma_req_size = CIK_SDMA_UCODE_SIZE * 4;

		break;

	default: BUG();

	}
@@ -3272,6 +3338,7 @@ static void cik_gpu_init(struct radeon_device *rdev) 
		gb_addr_config = BONAIRE_GB_ADDR_CONFIG_GOLDEN;

		break;

	case CHIP_KABINI:

	case CHIP_MULLINS:

	default:

		rdev->config.cik.max_shader_engines = 1;

		rdev->config.cik.max_tile_pipes = 2;
@@ -5801,6 +5868,9 @@ static int cik_rlc_resume(struct radeon_device *rdev) 
	case CHIP_KABINI:

		size = KB_RLC_UCODE_SIZE;

		break;

	case CHIP_MULLINS:

		size = ML_RLC_UCODE_SIZE;

		break;

	}



	cik_rlc_stop(rdev);
@@ -6549,6 +6619,7 @@ void cik_get_csb_buffer(struct radeon_device *rdev, volatile u32 *buffer) 
		buffer[count++] = cpu_to_le32(0x00000000);

		break;

	case CHIP_KABINI:

	case CHIP_MULLINS:

		buffer[count++] = cpu_to_le32(0x00000000); /* XXX */

		buffer[count++] = cpu_to_le32(0x00000000);

		break;

drivers/gpu/drm/radeon/kv_dpm.c

+106 −29
Original line number Diff line number Diff line
@@ -546,6 +546,52 @@ static int kv_set_divider_value(struct radeon_device *rdev, 
	return 0;

}



static u32 kv_convert_vid2_to_vid7(struct radeon_device *rdev,

				   struct sumo_vid_mapping_table *vid_mapping_table,

				   u32 vid_2bit)

{

	struct radeon_clock_voltage_dependency_table *vddc_sclk_table =

		&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk;

	u32 i;



	if (vddc_sclk_table && vddc_sclk_table->count) {

		if (vid_2bit < vddc_sclk_table->count)

			return vddc_sclk_table->entries[vid_2bit].v;

		else

			return vddc_sclk_table->entries[vddc_sclk_table->count - 1].v;

	} else {

		for (i = 0; i < vid_mapping_table->num_entries; i++) {

			if (vid_mapping_table->entries[i].vid_2bit == vid_2bit)

				return vid_mapping_table->entries[i].vid_7bit;

		}

		return vid_mapping_table->entries[vid_mapping_table->num_entries - 1].vid_7bit;

	}

}



static u32 kv_convert_vid7_to_vid2(struct radeon_device *rdev,

				   struct sumo_vid_mapping_table *vid_mapping_table,

				   u32 vid_7bit)

{

	struct radeon_clock_voltage_dependency_table *vddc_sclk_table =

		&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk;

	u32 i;



	if (vddc_sclk_table && vddc_sclk_table->count) {

		for (i = 0; i < vddc_sclk_table->count; i++) {

			if (vddc_sclk_table->entries[i].v == vid_7bit)

				return i;

		}

		return vddc_sclk_table->count - 1;

	} else {

		for (i = 0; i < vid_mapping_table->num_entries; i++) {

			if (vid_mapping_table->entries[i].vid_7bit == vid_7bit)

				return vid_mapping_table->entries[i].vid_2bit;

		}



		return vid_mapping_table->entries[vid_mapping_table->num_entries - 1].vid_2bit;

	}

}



static u16 kv_convert_8bit_index_to_voltage(struct radeon_device *rdev,

					    u16 voltage)

{
@@ -556,7 +602,7 @@ static u16 kv_convert_2bit_index_to_voltage(struct radeon_device *rdev, 
					    u32 vid_2bit)

{

	struct kv_power_info *pi = kv_get_pi(rdev);

	u32 vid_8bit = sumo_convert_vid2_to_vid7(rdev,

	u32 vid_8bit = kv_convert_vid2_to_vid7(rdev,

					       &pi->sys_info.vid_mapping_table,

					       vid_2bit);
@@ -639,7 +685,7 @@ static int kv_force_lowest_valid(struct radeon_device *rdev) 


static int kv_unforce_levels(struct radeon_device *rdev)

{

	if (rdev->family == CHIP_KABINI)

	if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS)

		return kv_notify_message_to_smu(rdev, PPSMC_MSG_NoForcedLevel);

	else

		return kv_set_enabled_levels(rdev);
@@ -1362,13 +1408,20 @@ static int kv_update_uvd_dpm(struct radeon_device *rdev, bool gate) 
	struct radeon_uvd_clock_voltage_dependency_table *table =

		&rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table;

	int ret;

	u32 mask;



	if (!gate) {

		if (!pi->caps_uvd_dpm || table->count || pi->caps_stable_p_state)

		if (table->count)

			pi->uvd_boot_level = table->count - 1;

		else

			pi->uvd_boot_level = 0;



		if (!pi->caps_uvd_dpm || pi->caps_stable_p_state) {

			mask = 1 << pi->uvd_boot_level;

		} else {

			mask = 0x1f;

		}



		ret = kv_copy_bytes_to_smc(rdev,

					   pi->dpm_table_start +

					   offsetof(SMU7_Fusion_DpmTable, UvdBootLevel),
@@ -1377,11 +1430,9 @@ static int kv_update_uvd_dpm(struct radeon_device *rdev, bool gate) 
		if (ret)

			return ret;



		if (!pi->caps_uvd_dpm ||

		    pi->caps_stable_p_state)

		kv_send_msg_to_smc_with_parameter(rdev,

						  PPSMC_MSG_UVDDPM_SetEnabledMask,

							  (1 << pi->uvd_boot_level));

						  mask);

	}



	return kv_enable_uvd_dpm(rdev, !gate);
@@ -1617,7 +1668,7 @@ static void kv_dpm_powergate_acp(struct radeon_device *rdev, bool gate) 
	if (pi->acp_power_gated == gate)

		return;



	if (rdev->family == CHIP_KABINI)

	if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS)

		return;



	pi->acp_power_gated = gate;
@@ -1786,7 +1837,7 @@ int kv_dpm_set_power_state(struct radeon_device *rdev) 
		}

	}



	if (rdev->family == CHIP_KABINI) {

	if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) {

		if (pi->enable_dpm) {

			kv_set_valid_clock_range(rdev, new_ps);

			kv_update_dfs_bypass_settings(rdev, new_ps);
@@ -1812,6 +1863,8 @@ int kv_dpm_set_power_state(struct radeon_device *rdev) 
				return ret;

			}

			kv_update_sclk_t(rdev);

			if (rdev->family == CHIP_MULLINS)

				kv_enable_nb_dpm(rdev);

		}

	} else {

		if (pi->enable_dpm) {
@@ -1862,7 +1915,7 @@ void kv_dpm_reset_asic(struct radeon_device *rdev) 
{

	struct kv_power_info *pi = kv_get_pi(rdev);



	if (rdev->family == CHIP_KABINI) {

	if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) {

		kv_force_lowest_valid(rdev);

		kv_init_graphics_levels(rdev);

		kv_program_bootup_state(rdev);
@@ -1901,14 +1954,41 @@ static void kv_construct_max_power_limits_table(struct radeon_device *rdev, 
static void kv_patch_voltage_values(struct radeon_device *rdev)

{

	int i;

	struct radeon_uvd_clock_voltage_dependency_table *table =

	struct radeon_uvd_clock_voltage_dependency_table *uvd_table =

		&rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table;

	struct radeon_vce_clock_voltage_dependency_table *vce_table =

		&rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table;

	struct radeon_clock_voltage_dependency_table *samu_table =

		&rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table;

	struct radeon_clock_voltage_dependency_table *acp_table =

		&rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table;



	if (table->count) {

		for (i = 0; i < table->count; i++)

			table->entries[i].v =

	if (uvd_table->count) {

		for (i = 0; i < uvd_table->count; i++)

			uvd_table->entries[i].v =

				kv_convert_8bit_index_to_voltage(rdev,

								 table->entries[i].v);

								 uvd_table->entries[i].v);

	}



	if (vce_table->count) {

		for (i = 0; i < vce_table->count; i++)

			vce_table->entries[i].v =

				kv_convert_8bit_index_to_voltage(rdev,

								 vce_table->entries[i].v);

	}



	if (samu_table->count) {

		for (i = 0; i < samu_table->count; i++)

			samu_table->entries[i].v =

				kv_convert_8bit_index_to_voltage(rdev,

								 samu_table->entries[i].v);

	}



	if (acp_table->count) {

		for (i = 0; i < acp_table->count; i++)

			acp_table->entries[i].v =

				kv_convert_8bit_index_to_voltage(rdev,

								 acp_table->entries[i].v);

	}



}
@@ -1941,7 +2021,7 @@ static int kv_force_dpm_highest(struct radeon_device *rdev) 
			break;

	}



	if (rdev->family == CHIP_KABINI)

	if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS)

		return kv_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_DPM_ForceState, i);

	else

		return kv_set_enabled_level(rdev, i);
@@ -1961,7 +2041,7 @@ static int kv_force_dpm_lowest(struct radeon_device *rdev) 
			break;

	}



	if (rdev->family == CHIP_KABINI)

	if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS)

		return kv_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_DPM_ForceState, i);

	else

		return kv_set_enabled_level(rdev, i);
@@ -2118,7 +2198,7 @@ static void kv_apply_state_adjust_rules(struct radeon_device *rdev, 
	else

		pi->battery_state = false;



	if (rdev->family == CHIP_KABINI) {

	if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) {

		ps->dpm0_pg_nb_ps_lo = 0x1;

		ps->dpm0_pg_nb_ps_hi = 0x0;

		ps->dpmx_nb_ps_lo = 0x1;
@@ -2179,7 +2259,7 @@ static int kv_calculate_nbps_level_settings(struct radeon_device *rdev) 
	if (pi->lowest_valid > pi->highest_valid)

		return -EINVAL;



	if (rdev->family == CHIP_KABINI) {

	if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) {

		for (i = pi->lowest_valid; i <= pi->highest_valid; i++) {

			pi->graphics_level[i].GnbSlow = 1;

			pi->graphics_level[i].ForceNbPs1 = 0;
@@ -2253,7 +2333,7 @@ static void kv_init_graphics_levels(struct radeon_device *rdev) 
				break;



			kv_set_divider_value(rdev, i, table->entries[i].clk);

			vid_2bit = sumo_convert_vid7_to_vid2(rdev,

			vid_2bit = kv_convert_vid7_to_vid2(rdev,

							   &pi->sys_info.vid_mapping_table,

							   table->entries[i].v);

			kv_set_vid(rdev, i, vid_2bit);
@@ -2324,7 +2404,7 @@ static void kv_program_nbps_index_settings(struct radeon_device *rdev, 
	struct kv_power_info *pi = kv_get_pi(rdev);

	u32 nbdpmconfig1;



	if (rdev->family == CHIP_KABINI)

	if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS)

		return;



	if (pi->sys_info.nb_dpm_enable) {
@@ -2631,9 +2711,6 @@ int kv_dpm_init(struct radeon_device *rdev) 


        pi->sram_end = SMC_RAM_END;



	if (rdev->family == CHIP_KABINI)

		pi->high_voltage_t = 4001;



	pi->enable_nb_dpm = true;



	pi->caps_power_containment = true;

drivers/gpu/drm/radeon/radeon_asic.c

+1 −0
Original line number Diff line number Diff line
@@ -2516,6 +2516,7 @@ int radeon_asic_init(struct radeon_device *rdev) 
		break;

	case CHIP_KAVERI:

	case CHIP_KABINI:

	case CHIP_MULLINS:

		rdev->asic = &kv_asic;

		/* set num crtcs */

		if (rdev->family == CHIP_KAVERI) {

drivers/gpu/drm/radeon/radeon_device.c

+1 −0
Original line number Diff line number Diff line
@@ -99,6 +99,7 @@ static const char radeon_family_name[][16] = { 
	"KAVERI",

	"KABINI",

	"HAWAII",

	"MULLINS",

	"LAST",

};

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