Commit 991f5c4d authored by Angelo Dureghello's avatar Angelo Dureghello Committed by Ulf Hansson
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m68k: mcf5441x: add support for esdhc mmc controller 



Add support for sdhci-edshc mmc controller.

Signed-off-by: default avatarAngelo Dureghello <angelo.dureghello@timesys.com>
Acked-by: default avatarGreg Ungerer <gerg@linux-m68k.org>
Link: https://lore.kernel.org/r/20200518191742.1251440-1-angelo.dureghello@timesys.com


Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent 1f8153ee

arch/m68k/coldfire/clk.c

+15 −0
Original line number Diff line number Diff line
@@ -73,6 +73,21 @@ struct clk_ops clk_ops1 = { 
#endif /* MCFPM_PPMCR1 */

#endif /* MCFPM_PPMCR0 */



static void __clk_enable2(struct clk *clk)

{

	__raw_writel(__raw_readl(MCFSDHC_CLK) | (1 << clk->slot), MCFSDHC_CLK);

}



static void __clk_disable2(struct clk *clk)

{

	__raw_writel(__raw_readl(MCFSDHC_CLK) & ~(1 << clk->slot), MCFSDHC_CLK);

}



struct clk_ops clk_ops2 = {

	.enable		= __clk_enable2,

	.disable	= __clk_disable2,

};



struct clk *clk_get(struct device *dev, const char *id)

{

	const char *clk_name = dev ? dev_name(dev) : id ? id : NULL;

arch/m68k/coldfire/device.c

+31 −2
Original line number Diff line number Diff line
@@ -22,6 +22,7 @@ 
#include <asm/mcfqspi.h>

#include <linux/platform_data/edma.h>

#include <linux/platform_data/dma-mcf-edma.h>

#include <linux/platform_data/mmc-esdhc-mcf.h>



/*

 *	All current ColdFire parts contain from 2, 3, 4 or 10 UARTS.
@@ -551,9 +552,35 @@ static struct platform_device mcf_edma = { 
		.platform_data = &mcf_edma_data,

	}

};



#endif /* IS_ENABLED(CONFIG_MCF_EDMA) */



#if IS_ENABLED(CONFIG_MMC)

static struct mcf_esdhc_platform_data mcf_esdhc_data = {

	.max_bus_width = 4,

	.cd_type = ESDHC_CD_NONE,

};



static struct resource mcf_esdhc_resources[] = {

	{

		.start = MCFSDHC_BASE,

		.end = MCFSDHC_BASE + MCFSDHC_SIZE - 1,

		.flags = IORESOURCE_MEM,

	}, {

		.start = MCF_IRQ_SDHC,

		.end = MCF_IRQ_SDHC,

		.flags = IORESOURCE_IRQ,

	},

};



static struct platform_device mcf_esdhc = {

	.name			= "sdhci-esdhc-mcf",

	.id			= 0,

	.num_resources		= ARRAY_SIZE(mcf_esdhc_resources),

	.resource		= mcf_esdhc_resources,

	.dev.platform_data	= &mcf_esdhc_data,

};

#endif /* IS_ENABLED(CONFIG_MMC) */



static struct platform_device *mcf_devices[] __initdata = {

	&mcf_uart,

#if IS_ENABLED(CONFIG_FEC)
@@ -586,6 +613,9 @@ static struct platform_device *mcf_devices[] __initdata = { 
#if IS_ENABLED(CONFIG_MCF_EDMA)

	&mcf_edma,

#endif

#if IS_ENABLED(CONFIG_MMC)

	&mcf_esdhc,

#endif

};



/*
@@ -614,4 +644,3 @@ static int __init mcf_init_devices(void) 
}



arch_initcall(mcf_init_devices);

arch/m68k/coldfire/m5441x.c

+11 −1
Original line number Diff line number Diff line
@@ -52,7 +52,7 @@ DEFINE_CLK(0, "mcfssi.0", 47, MCF_CLK); 
DEFINE_CLK(0, "pll.0", 48, MCF_CLK);

DEFINE_CLK(0, "mcfrng.0", 49, MCF_CLK);

DEFINE_CLK(0, "mcfssi.1", 50, MCF_CLK);

DEFINE_CLK(0, "mcfsdhc.0", 51, MCF_CLK);

DEFINE_CLK(0, "sdhci-esdhc-mcf.0", 51, MCF_CLK);

DEFINE_CLK(0, "enet-fec.0", 53, MCF_CLK);

DEFINE_CLK(0, "enet-fec.1", 54, MCF_CLK);

DEFINE_CLK(0, "switch.0", 55, MCF_CLK);
@@ -74,6 +74,10 @@ DEFINE_CLK(1, "mcfpwm.0", 34, MCF_BUSCLK); 
DEFINE_CLK(1, "sys.0", 36, MCF_BUSCLK);

DEFINE_CLK(1, "gpio.0", 37, MCF_BUSCLK);



DEFINE_CLK(2, "ipg.0", 0, MCF_CLK);

DEFINE_CLK(2, "ahb.0", 1, MCF_CLK);

DEFINE_CLK(2, "per.0", 2, MCF_CLK);



struct clk *mcf_clks[] = {

	&__clk_0_2,

	&__clk_0_8,
@@ -131,6 +135,11 @@ struct clk *mcf_clks[] = { 
	&__clk_1_34,

	&__clk_1_36,

	&__clk_1_37,



	&__clk_2_0,

	&__clk_2_1,

	&__clk_2_2,



	NULL,

};
@@ -151,6 +160,7 @@ static struct clk * const enable_clks[] __initconst = { 
	&__clk_0_33, /* pit.1 */

	&__clk_0_37, /* eport */

	&__clk_0_48, /* pll */

	&__clk_0_51, /* esdhc */



	&__clk_1_36, /* CCM/reset module/Power management */

	&__clk_1_37, /* gpio */

arch/m68k/include/asm/m5441xsim.h

+15 −0
Original line number Diff line number Diff line
@@ -278,6 +278,13 @@ 
#define MCFGPIO_IRQ_VECBASE	(MCFINT_VECBASE - MCFGPIO_IRQ_MIN)

#define MCFGPIO_PIN_MAX		87



/*

 * Phase Locked Loop (PLL)

 */

#define MCF_PLL_CR		0xFC0C0000

#define MCF_PLL_DR		0xFC0C0004

#define MCF_PLL_SR		0xFC0C0008



/*

 *  DSPI module.

 */
@@ -298,5 +305,13 @@ 
#define MCFEDMA_IRQ_INTR16	(MCFINT1_VECBASE + MCFEDMA_EDMA_INTR16)

#define MCFEDMA_IRQ_INTR56	(MCFINT2_VECBASE + MCFEDMA_EDMA_INTR56)

#define MCFEDMA_IRQ_ERR	(MCFINT0_VECBASE + MCFINT0_EDMA_ERR)

/*

 *  esdhc module.

 */

#define MCFSDHC_BASE		0xfc0cc000

#define MCFSDHC_SIZE		256

#define MCFINT2_SDHC		31

#define MCF_IRQ_SDHC		(MCFINT2_VECBASE + MCFINT2_SDHC)

#define MCFSDHC_CLK		(MCFSDHC_BASE + 0x2c)



#endif /* m5441xsim_h */

arch/m68k/include/asm/mcfclk.h

+2 −0
Original line number Diff line number Diff line
@@ -30,6 +30,8 @@ extern struct clk_ops clk_ops0; 
extern struct clk_ops clk_ops1;

#endif /* MCFPM_PPMCR1 */



extern struct clk_ops clk_ops2;



#define DEFINE_CLK(clk_bank, clk_name, clk_slot, clk_rate) \

static struct clk __clk_##clk_bank##_##clk_slot = { \

	.name = clk_name, \

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