Commit 98a2494f authored by Aapo Vienamo's avatar Aapo Vienamo Committed by Thierry Reding
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arm64: dts: tegra186: Assign clocks for sdmmc1 and sdmmc4



Configure sdmmc4 parent clock to pllc4 and sdmmc1 to pllp_out0 by
setting the assigned-clocks device tree properties. pllc4 offer
better jitter performance and should be used with higher speed
modes like HS200 and HS400.

Signed-off-by: default avatarAapo Vienamo <avienamo@nvidia.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 918f9671
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+6 −0
Original line number Diff line number Diff line
@@ -248,6 +248,9 @@
		nvidia,pad-autocal-pull-down-offset-sdr104 = <0x05>;
		nvidia,default-tap = <0x5>;
		nvidia,default-trim = <0xb>;
		assigned-clocks = <&bpmp TEGRA186_CLK_SDMMC1>,
				  <&bpmp TEGRA186_CLK_PLLP_OUT0>;
		assigned-clock-parents = <&bpmp TEGRA186_CLK_PLLP_OUT0>;
		status = "disabled";
	};

@@ -299,6 +302,9 @@
		interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&bpmp TEGRA186_CLK_SDMMC4>;
		clock-names = "sdhci";
		assigned-clocks = <&bpmp TEGRA186_CLK_SDMMC4>,
				  <&bpmp TEGRA186_CLK_PLLC4_VCO>;
		assigned-clock-parents = <&bpmp TEGRA186_CLK_PLLC4_VCO>;
		resets = <&bpmp TEGRA186_RESET_SDMMC4>;
		reset-names = "sdhci";
		nvidia,pad-autocal-pull-up-offset-hs400 = <0x05>;