Commit 9892f9f6 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'drm-fixes-2019-10-11' of git://anongit.freedesktop.org/drm/drm 

Pull drm fixes from Dave Airlie:
 "The regular fixes pull for rc3. The i915 team found some fixes they
  (or I) missed for rc1, which is why this is a bit bigger than usual,
  otherwise there is a single amdgpu fix, some spi panel aliases, and a
  bridge fix.

  i915:
   - execlist access fixes
   - list deletion fix
   - CML display fix
   - HSW workaround extension to GT2
   - chicken bit whitelist
   - GGTT resume issue
   - SKL GPU hangs for Vulkan compute

  amdgpu:
   - memory leak fix

  panel:
   - spi aliases

  tc358767:
   - bridge artifacts fix"

* tag 'drm-fixes-2019-10-11' of git://anongit.freedesktop.org/drm/drm: (22 commits)
  drm/bridge: tc358767: fix max_tu_symbol value
  drm/i915/gt: execlists->active is serialised by the tasklet
  drm/i915/execlists: Protect peeking at execlists->active
  drm/i915: Fixup preempt-to-busy vs reset of a virtual request
  drm/i915: Only enqueue already completed requests
  drm/i915/execlists: Drop redundant list_del_init(&rq->sched.link)
  drm/i915/cml: Add second PCH ID for CMP
  drm/amdgpu: fix memory leak
  drm/panel: tpo-td043mtea1: Fix SPI alias
  drm/panel: tpo-td028ttec1: Fix SPI alias
  drm/panel: sony-acx565akm: Fix SPI alias
  drm/panel: nec-nl8048hl11: Fix SPI alias
  drm/panel: lg-lb035q02: Fix SPI alias
  drm/i915: Mark contents as dirty on a write fault
  drm/i915: Prevent bonded requests from overtaking each other on preemption
  drm/i915: Bump skl+ max plane width to 5k for linear/x-tiled
  drm/i915: Verify the engine after acquiring the active.lock
  drm/i915: Extend Haswell GT1 PSMI workaround to all
  drm/i915: Don't mix srcu tag and negative error codes
  drm/i915: Whitelist COMMON_SLICE_CHICKEN2
  ...
parents 297cbccc 4adbcff2

drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c

+7 −7
Original line number Diff line number Diff line
@@ -270,7 +270,7 @@ int amdgpu_bo_list_ioctl(struct drm_device *dev, void *data, 


	r = amdgpu_bo_create_list_entry_array(&args->in, &info);

	if (r)

		goto error_free;

		return r;



	switch (args->in.operation) {

	case AMDGPU_BO_LIST_OP_CREATE:
@@ -283,8 +283,7 @@ int amdgpu_bo_list_ioctl(struct drm_device *dev, void *data, 
		r = idr_alloc(&fpriv->bo_list_handles, list, 1, 0, GFP_KERNEL);

		mutex_unlock(&fpriv->bo_list_lock);

		if (r < 0) {

			amdgpu_bo_list_put(list);

			return r;

			goto error_put_list;

		}



		handle = r;
@@ -306,9 +305,8 @@ int amdgpu_bo_list_ioctl(struct drm_device *dev, void *data, 
		mutex_unlock(&fpriv->bo_list_lock);



		if (IS_ERR(old)) {

			amdgpu_bo_list_put(list);

			r = PTR_ERR(old);

			goto error_free;

			goto error_put_list;

		}



		amdgpu_bo_list_put(old);
@@ -325,8 +323,10 @@ int amdgpu_bo_list_ioctl(struct drm_device *dev, void *data, 


	return 0;



error_put_list:

	amdgpu_bo_list_put(list);



error_free:

	if (info)

	kvfree(info);

	return r;

}

drivers/gpu/drm/bridge/tc358767.c

+6 −1
Original line number Diff line number Diff line
@@ -728,6 +728,8 @@ static int tc_set_video_mode(struct tc_data *tc, 
	int lower_margin = mode->vsync_start - mode->vdisplay;

	int vsync_len = mode->vsync_end - mode->vsync_start;

	u32 dp0_syncval;

	u32 bits_per_pixel = 24;

	u32 in_bw, out_bw;



	/*

	 * Recommended maximum number of symbols transferred in a transfer unit:
@@ -735,7 +737,10 @@ static int tc_set_video_mode(struct tc_data *tc, 
	 *              (output active video bandwidth in bytes))

	 * Must be less than tu_size.

	 */

	max_tu_symbol = TU_SIZE_RECOMMENDED - 1;



	in_bw = mode->clock * bits_per_pixel / 8;

	out_bw = tc->link.base.num_lanes * tc->link.base.rate;

	max_tu_symbol = DIV_ROUND_UP(in_bw * TU_SIZE_RECOMMENDED, out_bw);



	dev_dbg(tc->dev, "set mode %dx%d\n",

		mode->hdisplay, mode->vdisplay);

drivers/gpu/drm/i915/display/intel_display.c

+14 −1
Original line number Diff line number Diff line
@@ -3280,7 +3280,20 @@ static int skl_max_plane_width(const struct drm_framebuffer *fb, 
	switch (fb->modifier) {

	case DRM_FORMAT_MOD_LINEAR:

	case I915_FORMAT_MOD_X_TILED:

		/*

		 * Validated limit is 4k, but has 5k should

		 * work apart from the following features:

		 * - Ytile (already limited to 4k)

		 * - FP16 (already limited to 4k)

		 * - render compression (already limited to 4k)

		 * - KVMR sprite and cursor (don't care)

		 * - horizontal panning (TODO verify this)

		 * - pipe and plane scaling (TODO verify this)

		 */

		if (cpp == 8)

			return 4096;

		else

			return 5120;

	case I915_FORMAT_MOD_Y_TILED_CCS:

	case I915_FORMAT_MOD_Yf_TILED_CCS:

		/* FIXME AUX plane? */

drivers/gpu/drm/i915/gem/i915_gem_mman.c

+7 −5
Original line number Diff line number Diff line
@@ -245,11 +245,9 @@ vm_fault_t i915_gem_fault(struct vm_fault *vmf) 


	wakeref = intel_runtime_pm_get(rpm);



	srcu = intel_gt_reset_trylock(ggtt->vm.gt);

	if (srcu < 0) {

		ret = srcu;

	ret = intel_gt_reset_trylock(ggtt->vm.gt, &srcu);

	if (ret)

		goto err_rpm;

	}



	ret = i915_mutex_lock_interruptible(dev);

	if (ret)
@@ -318,7 +316,11 @@ vm_fault_t i915_gem_fault(struct vm_fault *vmf) 
		intel_wakeref_auto(&i915->ggtt.userfault_wakeref,

				   msecs_to_jiffies_timeout(CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND));



	if (write) {

		GEM_BUG_ON(!i915_gem_object_has_pinned_pages(obj));

		i915_vma_set_ggtt_write(vma);

		obj->mm.dirty = true;

	}



err_fence:

	i915_vma_unpin_fence(vma);

drivers/gpu/drm/i915/gem/i915_gem_pm.c

+0 −3
Original line number Diff line number Diff line
@@ -241,9 +241,6 @@ void i915_gem_resume(struct drm_i915_private *i915) 
	mutex_lock(&i915->drm.struct_mutex);

	intel_uncore_forcewake_get(&i915->uncore, FORCEWAKE_ALL);



	i915_gem_restore_gtt_mappings(i915);

	i915_gem_restore_fences(i915);



	if (i915_gem_init_hw(i915))

		goto err_wedged;

CRA Git | Maintained and supported by SUSTech CRA and CCSE