Commit 98751b8c authored Dec 03, 2018 by José Roberto de Souza

drm/i915/psr: Enable sink to trigger a interruption on PSR2 CRC mismatch



eDP spec states 2 different bits to enable sink to trigger a
interruption when there is a CRC mismatch.
DP_PSR_CRC_VERIFICATION is for PSR only and
DP_PSR_IRQ_HPD_WITH_CRC_ERRORS is for PSR2 only.

Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181204003403.23361-4-jose.souza@intel.com

parent de570946

drivers/gpu/drm/i915/intel_psr.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -394,7 +394,7 @@ static void intel_psr_enable_sink(struct intel_dp *intel_dp)
		if (dev_priv->psr.psr2_enabled) {
		drm_dp_dpcd_writeb(&intel_dp->aux, DP_RECEIVER_ALPM_CONFIG,
		DP_ALPM_ENABLE);
		dpcd_val \|= DP_PSR_ENABLE_PSR2;
		dpcd_val \|= DP_PSR_ENABLE_PSR2 \| DP_PSR_IRQ_HPD_WITH_CRC_ERRORS;
		} else {
		if (dev_priv->psr.link_standby)
		dpcd_val \|= DP_PSR_MAIN_LINK_ACTIVE;

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