Commit 981cc23e authored by Luo Jiaxing's avatar Luo Jiaxing Committed by Martin K. Petersen
Browse files

scsi: hisi_sas: Add BIST support for fixed code pattern 

Through the new debugfs interface the user can select fixed code
patterns. Add two new interfaces fixed_code and fixed_code1.

Link: https://lore.kernel.org/r/1598958790-232272-7-git-send-email-john.garry@huawei.com


Signed-off-by: default avatarLuo Jiaxing <luojiaxing@huawei.com>
Signed-off-by: default avatarJohn Garry <john.garry@huawei.com>
Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
parent 2c4d5823

drivers/scsi/hisi_sas/hisi_sas.h

+22 −0
Original line number Diff line number Diff line
@@ -285,6 +285,27 @@ enum hisi_sas_debugfs_bist_ffe_cfg { 
	FFE_CFG_MAX

};



enum hisi_sas_debugfs_bist_fixed_code {

	FIXED_CODE,

	FIXED_CODE_1,

	FIXED_CODE_MAX

};



enum {

	HISI_SAS_BIST_CODE_MODE_PRBS7,

	HISI_SAS_BIST_CODE_MODE_PRBS23,

	HISI_SAS_BIST_CODE_MODE_PRBS31,

	HISI_SAS_BIST_CODE_MODE_JTPAT,

	HISI_SAS_BIST_CODE_MODE_CJTPAT,

	HISI_SAS_BIST_CODE_MODE_SCRAMBED_0,

	HISI_SAS_BIST_CODE_MODE_TRAIN,

	HISI_SAS_BIST_CODE_MODE_TRAIN_DONE,

	HISI_SAS_BIST_CODE_MODE_HFTP,

	HISI_SAS_BIST_CODE_MODE_MFTP,

	HISI_SAS_BIST_CODE_MODE_LFTP,

	HISI_SAS_BIST_CODE_MODE_FIXED_DATA,

};



struct hisi_sas_hw {

	int (*hw_init)(struct hisi_hba *hisi_hba);

	void (*setup_itct)(struct hisi_hba *hisi_hba,
@@ -453,6 +474,7 @@ struct hisi_hba { 
	u32 debugfs_bist_cnt;

	int debugfs_bist_enable;

	u32 debugfs_bist_ffe[HISI_SAS_MAX_PHYS][FFE_CFG_MAX];

	u32 debugfs_bist_fixed_code[FIXED_CODE_MAX];



	/* debugfs memories */

	/* Put Global AXI and RAS Register into register array */

drivers/scsi/hisi_sas/hisi_sas_main.c

+10 −15
Original line number Diff line number Diff line
@@ -3334,21 +3334,6 @@ enum { 
	HISI_SAS_BIST_LOOPBACK_MODE_REMOTE,

};



enum {

	HISI_SAS_BIST_CODE_MODE_PRBS7 = 0,

	HISI_SAS_BIST_CODE_MODE_PRBS23,

	HISI_SAS_BIST_CODE_MODE_PRBS31,

	HISI_SAS_BIST_CODE_MODE_JTPAT,

	HISI_SAS_BIST_CODE_MODE_CJTPAT,

	HISI_SAS_BIST_CODE_MODE_SCRAMBED_0,

	HISI_SAS_BIST_CODE_MODE_TRAIN,

	HISI_SAS_BIST_CODE_MODE_TRAIN_DONE,

	HISI_SAS_BIST_CODE_MODE_HFTP,

	HISI_SAS_BIST_CODE_MODE_MFTP,

	HISI_SAS_BIST_CODE_MODE_LFTP,

	HISI_SAS_BIST_CODE_MODE_FIXED_DATA,

};



static const struct {

	int		value;

	char		*name;
@@ -3966,6 +3951,16 @@ static void hisi_sas_debugfs_bist_init(struct hisi_hba *hisi_hba) 
			    hisi_hba->debugfs_bist_dentry, hisi_hba,

			    &hisi_sas_debugfs_bist_code_mode_ops);



	debugfs_create_file("fixed_code", 0600,

			    hisi_hba->debugfs_bist_dentry,

			    &hisi_hba->debugfs_bist_fixed_code[0],

			    &hisi_sas_debugfs_ops);



	debugfs_create_file("fixed_code_1", 0600,

			    hisi_hba->debugfs_bist_dentry,

			    &hisi_hba->debugfs_bist_fixed_code[1],

			    &hisi_sas_debugfs_ops);



	debugfs_create_file("phy_id", 0600, hisi_hba->debugfs_bist_dentry,

			    hisi_hba, &hisi_sas_debugfs_bist_phy_ops);

drivers/scsi/hisi_sas/hisi_sas_v3_hw.c

+27 −16
Original line number Diff line number Diff line
@@ -3033,14 +3033,16 @@ static int debugfs_set_bist_v3_hw(struct hisi_hba *hisi_hba, bool enable) 
	u32 *ffe = hisi_hba->debugfs_bist_ffe[phy_no];

	u32 code_mode = hisi_hba->debugfs_bist_code_mode;

	u32 path_mode = hisi_hba->debugfs_bist_mode;

	u32 *fix_code = &hisi_hba->debugfs_bist_fixed_code[0];

	struct device *dev = hisi_hba->dev;



	dev_info(dev, "BIST info:phy%d link_rate=%d code_mode=%d path_mode=%d ffe={0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x}\n",

	dev_info(dev, "BIST info:phy%d link_rate=%d code_mode=%d path_mode=%d ffe={0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x} fixed_code={0x%x, 0x%x}\n",

		 phy_no, linkrate, code_mode, path_mode,

		 ffe[FFE_SAS_1_5_GBPS], ffe[FFE_SAS_3_0_GBPS],

		 ffe[FFE_SAS_6_0_GBPS], ffe[FFE_SAS_12_0_GBPS],

		 ffe[FFE_SATA_1_5_GBPS], ffe[FFE_SATA_3_0_GBPS],

		 ffe[FFE_SATA_6_0_GBPS]);

		 ffe[FFE_SATA_6_0_GBPS], fix_code[FIXED_CODE],

		 fix_code[FIXED_CODE_1]);

	mode_tmp = path_mode ? 2 : 1;

	if (enable) {

		/* some preparations before bist test */
@@ -3057,28 +3059,37 @@ static int debugfs_set_bist_v3_hw(struct hisi_hba *hisi_hba, bool enable) 
		/* set code mode of bit test */

		reg_val = hisi_sas_phy_read32(hisi_hba, phy_no,

					      SAS_PHY_BIST_CTRL);

		reg_val &= ~(CFG_BIST_MODE_SEL_MSK |

				CFG_LOOP_TEST_MODE_MSK |

				CFG_RX_BIST_EN_MSK |

				CFG_TX_BIST_EN_MSK |

		reg_val &= ~(CFG_BIST_MODE_SEL_MSK | CFG_LOOP_TEST_MODE_MSK |

			     CFG_RX_BIST_EN_MSK | CFG_TX_BIST_EN_MSK |

			     CFG_BIST_TEST_MSK);

		reg_val |= ((code_mode << CFG_BIST_MODE_SEL_OFF) |

			    (mode_tmp << CFG_LOOP_TEST_MODE_OFF) |

			    CFG_BIST_TEST_MSK);

		hisi_sas_phy_write32(hisi_hba, phy_no,

				     SAS_PHY_BIST_CTRL, reg_val);

		hisi_sas_phy_write32(hisi_hba, phy_no, SAS_PHY_BIST_CTRL,

				     reg_val);



		/* set the bist init value */

		if (code_mode == HISI_SAS_BIST_CODE_MODE_FIXED_DATA) {

			reg_val = hisi_hba->debugfs_bist_fixed_code[0];

			hisi_sas_phy_write32(hisi_hba, phy_no,

					     SAS_PHY_BIST_CODE, reg_val);



			reg_val = hisi_hba->debugfs_bist_fixed_code[1];

			hisi_sas_phy_write32(hisi_hba, phy_no,

					     SAS_PHY_BIST_CODE1, reg_val);

		} else {

			hisi_sas_phy_write32(hisi_hba, phy_no,

					     SAS_PHY_BIST_CODE,

					     SAS_PHY_BIST_CODE_INIT);

		hisi_sas_phy_write32(hisi_hba, phy_no, SAS_PHY_BIST_CODE1,

			hisi_sas_phy_write32(hisi_hba, phy_no,

					     SAS_PHY_BIST_CODE1,

					     SAS_PHY_BIST_CODE1_INIT);

		}



		mdelay(100);

		reg_val |= (CFG_RX_BIST_EN_MSK | CFG_TX_BIST_EN_MSK);

		hisi_sas_phy_write32(hisi_hba, phy_no,

				     SAS_PHY_BIST_CTRL, reg_val);

		hisi_sas_phy_write32(hisi_hba, phy_no, SAS_PHY_BIST_CTRL,

				     reg_val);



		/* clear error bit */

		mdelay(100);

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