Commit 97ef1226 authored by Kalle Valo's avatar Kalle Valo
Browse files
ath.git patches for 5.5. Major changes:

ath10k

* add support for hardware rfkill on devices where firmware supports it
parents 4a50d454 2c840676
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+6 −0
Original line number Diff line number Diff line
@@ -81,6 +81,12 @@ Optional properties:
	Definition: Name of external front end module used. Some valid FEM names
		    for example: "microsemi-lx5586", "sky85703-11"
		    and "sky85803" etc.
- qcom,snoc-host-cap-8bit-quirk:
	Usage: Optional
	Value type: <empty>
	Definition: Quirk specifying that the firmware expects the 8bit version
		    of the host capability QMI request
- qcom,xo-cal-data: xo cal offset to be configured in xo trim register.

Example (to supply PCI based wifi block details):

+2 −1
Original line number Diff line number Diff line
@@ -255,6 +255,7 @@ static int ar5523_cmd(struct ar5523 *ar, u32 code, const void *idata,

	if (flags & AR5523_CMD_FLAG_MAGIC)
		hdr->magic = cpu_to_be32(1 << 24);
	if (ilen)
		memcpy(hdr + 1, idata, ilen);

	cmd->odata = odata;
+42 −16
Original line number Diff line number Diff line
@@ -677,13 +677,22 @@ static void ath10k_send_suspend_complete(struct ath10k *ar)
	complete(&ar->target_suspend);
}

static void ath10k_init_sdio(struct ath10k *ar, enum ath10k_firmware_mode mode)
static int ath10k_init_sdio(struct ath10k *ar, enum ath10k_firmware_mode mode)
{
	int ret;
	u32 param = 0;

	ath10k_bmi_write32(ar, hi_mbox_io_block_sz, 256);
	ath10k_bmi_write32(ar, hi_mbox_isr_yield_limit, 99);
	ath10k_bmi_read32(ar, hi_acs_flags, &param);
	ret = ath10k_bmi_write32(ar, hi_mbox_io_block_sz, 256);
	if (ret)
		return ret;

	ret = ath10k_bmi_write32(ar, hi_mbox_isr_yield_limit, 99);
	if (ret)
		return ret;

	ret = ath10k_bmi_read32(ar, hi_acs_flags, &param);
	if (ret)
		return ret;

	/* Data transfer is not initiated, when reduced Tx completion
	 * is used for SDIO. disable it until fixed
@@ -700,14 +709,23 @@ static void ath10k_init_sdio(struct ath10k *ar, enum ath10k_firmware_mode mode)
	else
		param |= HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET;

	ath10k_bmi_write32(ar, hi_acs_flags, param);
	ret = ath10k_bmi_write32(ar, hi_acs_flags, param);
	if (ret)
		return ret;

	/* Explicitly set fwlog prints to zero as target may turn it on
	 * based on scratch registers.
	 */
	ath10k_bmi_read32(ar, hi_option_flag, &param);
	ret = ath10k_bmi_read32(ar, hi_option_flag, &param);
	if (ret)
		return ret;

	param |= HI_OPTION_DISABLE_DBGLOG;
	ath10k_bmi_write32(ar, hi_option_flag, param);
	ret = ath10k_bmi_write32(ar, hi_option_flag, param);
	if (ret)
		return ret;

	return 0;
}

static int ath10k_init_configure_target(struct ath10k *ar)
@@ -2118,13 +2136,16 @@ static int ath10k_init_uart(struct ath10k *ar)
		return ret;
	}

	if (!uart_print && ar->hw_params.uart_pin_workaround) {
	if (!uart_print) {
		if (ar->hw_params.uart_pin_workaround) {
			ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin,
						 ar->hw_params.uart_pin);
			if (ret) {
			ath10k_warn(ar, "failed to set UART TX pin: %d", ret);
				ath10k_warn(ar, "failed to set UART TX pin: %d",
					    ret);
				return ret;
			}
		}

		return 0;
	}
@@ -2562,8 +2583,13 @@ int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode,
		if (status)
			goto err;

		if (ar->hif.bus == ATH10K_BUS_SDIO)
			ath10k_init_sdio(ar, mode);
		if (ar->hif.bus == ATH10K_BUS_SDIO) {
			status = ath10k_init_sdio(ar, mode);
			if (status) {
				ath10k_err(ar, "failed to init SDIO: %d\n", status);
				goto err;
			}
		}
	}

	ar->htc.htc_ops.target_send_suspend_complete =
@@ -2784,7 +2810,7 @@ int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode,

	status = ath10k_hif_set_target_log_mode(ar, fw_diag_log);
	if (status && status != -EOPNOTSUPP) {
		ath10k_warn(ar, "set traget log mode faileds: %d\n", status);
		ath10k_warn(ar, "set target log mode failed: %d\n", status);
		goto err_hif_stop;
	}

+9 −0
Original line number Diff line number Diff line
@@ -169,6 +169,7 @@ struct ath10k_wmi {
	struct wmi_cmd_map *cmd;
	struct wmi_vdev_param_map *vdev_param;
	struct wmi_pdev_param_map *pdev_param;
	struct wmi_peer_param_map *peer_param;
	const struct wmi_ops *ops;
	const struct wmi_peer_flags_map *peer_flags;

@@ -963,12 +964,20 @@ struct ath10k {
	u32 hw_eeprom_rd;
	u32 ht_cap_info;
	u32 vht_cap_info;
	u32 vht_supp_mcs;
	u32 num_rf_chains;
	u32 max_spatial_stream;
	/* protected by conf_mutex */
	u32 low_2ghz_chan;
	u32 high_2ghz_chan;
	u32 low_5ghz_chan;
	u32 high_5ghz_chan;
	bool ani_enabled;
	u32 sys_cap_info;

	/* protected by data_lock */
	bool hw_rfkill_on;

	/* protected by conf_mutex */
	u8 ps_state_enable;

+32 −6
Original line number Diff line number Diff line
@@ -703,7 +703,7 @@ static const struct ath10k_mem_region qca99x0_hw20_mem_regions[] = {
	},
	{
		.type = ATH10K_MEM_REGION_TYPE_REG,
		.start = 0x98000,
		.start = 0x980000,
		.len = 0x50000,
		.name = "IRAM",
		.section_table = {
@@ -786,7 +786,7 @@ static const struct ath10k_mem_region qca9984_hw10_mem_regions[] = {
	},
	{
		.type = ATH10K_MEM_REGION_TYPE_REG,
		.start = 0x98000,
		.start = 0x980000,
		.len = 0x50000,
		.name = "IRAM",
		.section_table = {
@@ -891,7 +891,7 @@ static const struct ath10k_mem_region qca4019_hw10_mem_regions[] = {
	},
	{
		.type = ATH10K_MEM_REGION_TYPE_REG,
		.start = 0x98000,
		.start = 0x980000,
		.len = 0x50000,
		.name = "IRAM",
		.section_table = {
@@ -951,6 +951,19 @@ static const struct ath10k_mem_region qca4019_hw10_mem_regions[] = {
	},
};

static const struct ath10k_mem_region wcn399x_hw10_mem_regions[] = {
	{
		/* MSA region start is not fixed, hence it is assigned at runtime */
		.type = ATH10K_MEM_REGION_TYPE_MSA,
		.len = 0x100000,
		.name = "DRAM",
		.section_table = {
			.sections = NULL,
			.size = 0,
		},
	},
};

static const struct ath10k_hw_mem_layout hw_mem_layouts[] = {
	{
		.hw_id = QCA6174_HW_1_0_VERSION,
@@ -1048,6 +1061,14 @@ static const struct ath10k_hw_mem_layout hw_mem_layouts[] = {
			.size = ARRAY_SIZE(qca4019_hw10_mem_regions),
		},
	},
	{
		.hw_id = WCN3990_HW_1_0_DEV_VERSION,
		.hw_rev = ATH10K_HW_WCN3990,
		.region_table = {
			.regions = wcn399x_hw10_mem_regions,
			.size = ARRAY_SIZE(wcn399x_hw10_mem_regions),
		},
	},
};

static u32 ath10k_coredump_get_ramdump_size(struct ath10k *ar)
@@ -1208,10 +1229,12 @@ static struct ath10k_dump_file_data *ath10k_coredump_build(struct ath10k *ar)
		dump_tlv = (struct ath10k_tlv_dump_data *)(buf + sofar);
		dump_tlv->type = cpu_to_le32(ATH10K_FW_CRASH_DUMP_RAM_DATA);
		dump_tlv->tlv_len = cpu_to_le32(crash_data->ramdump_buf_len);
		if (crash_data->ramdump_buf_len) {
			memcpy(dump_tlv->tlv_data, crash_data->ramdump_buf,
			       crash_data->ramdump_buf_len);
			sofar += sizeof(*dump_tlv) + crash_data->ramdump_buf_len;
		}
	}

	mutex_unlock(&ar->dump_mutex);

@@ -1257,6 +1280,9 @@ int ath10k_coredump_register(struct ath10k *ar)
	if (test_bit(ATH10K_FW_CRASH_DUMP_RAM_DATA, &ath10k_coredump_mask)) {
		crash_data->ramdump_buf_len = ath10k_coredump_get_ramdump_size(ar);

		if (!crash_data->ramdump_buf_len)
			return 0;

		crash_data->ramdump_buf = vzalloc(crash_data->ramdump_buf_len);
		if (!crash_data->ramdump_buf)
			return -ENOMEM;
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