Commit 97ea5654 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-next-2019-10-07' of git://anongit.freedesktop.org/drm/drm-intel into drm-next 



UAPI Changes:
- Never allow userptr into the mappable GGTT (Chris)
  No existing users. Avoid anyone from even trying to
  spare a deadlock scenario.

Cross-subsystem Changes:

Core Changes:

Driver Changes:

- Eliminate struct_mutex use as BKL! (Chris)
  Only used for execbuf serialisation.

- Initialize DDI TC and TBT ports (D-I) on Tigerlake (Lucas)
- Fix DKL link training for 2.7GHz and 1.62GHz (Jose)
- Add Tigerlake DKL PHY programming sequences (Clinton)
- Add Tigerlake Thunderbolt PLL divider values (Imre)

- drm/i915: Use helpers for drm_mm_node booleans (Chris)
- Restrict L3 remapping sysfs interface to dwords (Chris)
- Fix audio power up sequence for gen10+ display (Kai)
- Skip redundant execlist resubmission (Chris)
- Only unwedge if we can reset GPU first (Chris)
- Initialise breadcrumb lists on the virtual engine (Chris)
- Don't rely on kernel context existing during early errors (Matt A)
- Update Icelake+ MG_DP_MODE programming table (Clinton)
- Update DMC firmware for Icelake (Anusha)
- Downgrade DP MST error after unplugging TypeC cable (Srinivasan)
- Limit MST modes based on plane size too (Ville)
- Polish intel_tv_mode_valid() (Ville)
- Fix g4x sprite scaling stride check with GTT remapping (Ville)
- Don't advertize non-exisiting crtcs (Ville)
- Clean up encoder->crtc_mask setup (Ville)
- Use tc_port instead of port parameter to MG registers (Jose)
- Remove static variable for aux last status (Jani)
- Implement a better i945gm vblank irq vs. C-states workaround (Ville)

- Make the object creation interface consistent (CQ)
- Rename intel_vga_msr_write() to intel_vga_reset_io_mem() (Jani, Ville)
- Eliminate previous drm_dbg/drm_err usage (Jani)
- Move gmbus setup down to intel_modeset_init() (Jani)
- Abstract all vgaarb access to intel_vga.[ch] (Jani)
- Split out i915_switcheroo.[ch] from i915_drv.c (Jani)
- Use intel_gt in has_reset* (Chris)
- Eliminate return value for i915_gem_init_early (Matt A)
- Selftest improvements (Chris)
- Update HuC firmware header version number format (Daniele)

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191007134801.GA24313@jlahtine-desk.ger.corp.intel.com
parents da0c9ea1 9445ad17

Documentation/gpu/i915.rst

+16 −16
Original line number Diff line number Diff line
@@ -246,6 +246,15 @@ Display PLLs 
.. kernel-doc:: drivers/gpu/drm/i915/display/intel_dpll_mgr.h

   :internal:



Display State Buffer

--------------------



.. kernel-doc:: drivers/gpu/drm/i915/display/intel_dsb.c

   :doc: DSB



.. kernel-doc:: drivers/gpu/drm/i915/display/intel_dsb.c

   :internal:



Memory Management and Command Submission

========================================
@@ -358,15 +367,6 @@ Batchbuffer Parsing 
.. kernel-doc:: drivers/gpu/drm/i915/i915_cmd_parser.c

   :internal:



Batchbuffer Pools

-----------------



.. kernel-doc:: drivers/gpu/drm/i915/i915_gem_batch_pool.c

   :doc: batch pool



.. kernel-doc:: drivers/gpu/drm/i915/i915_gem_batch_pool.c

   :internal:



User Batchbuffer Execution

--------------------------
@@ -416,31 +416,31 @@ Object Tiling IOCTLs 
   :doc: buffer object tiling



WOPCM

=====

-----



WOPCM Layout

------------

~~~~~~~~~~~~



.. kernel-doc:: drivers/gpu/drm/i915/intel_wopcm.c

   :doc: WOPCM Layout



GuC

===

---



Firmware Layout

-------------------

~~~~~~~~~~~~~~~



.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_uc_fw_abi.h

   :doc: Firmware Layout



GuC-specific firmware loader

----------------------------

~~~~~~~~~~~~~~~~~~~~~~~~~~~~



.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c

   :internal:



GuC-based command submission

----------------------------

~~~~~~~~~~~~~~~~~~~~~~~~~~~~



.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

   :doc: GuC-based command submission
@@ -449,7 +449,7 @@ GuC-based command submission 
   :internal:



GuC Address Space

-----------------

~~~~~~~~~~~~~~~~~



.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_guc.c

   :doc: GuC Address Space

drivers/gpu/drm/i915/Makefile

+6 −1
Original line number Diff line number Diff line
@@ -46,6 +46,7 @@ i915-y += i915_drv.o \ 
	  i915_pci.o \

	  i915_scatterlist.o \

	  i915_suspend.o \

	  i915_switcheroo.o \

	  i915_sysfs.o \

	  i915_utils.o \

	  intel_csr.o \
@@ -83,8 +84,10 @@ gt-y += \ 
	gt/intel_gt_irq.o \

	gt/intel_gt_pm.o \

	gt/intel_gt_pm_irq.o \

	gt/intel_gt_requests.o \

	gt/intel_hangcheck.o \

	gt/intel_lrc.o \

	gt/intel_rc6.o \

	gt/intel_renderstate.o \

	gt/intel_reset.o \

	gt/intel_ringbuffer.o \
@@ -172,6 +175,7 @@ i915-y += \ 
	display/intel_display_power.o \

	display/intel_dpio_phy.o \

	display/intel_dpll_mgr.o \

	display/intel_dsb.o \

	display/intel_fbc.o \

	display/intel_fifo_underrun.o \

	display/intel_frontbuffer.o \
@@ -182,7 +186,8 @@ i915-y += \ 
	display/intel_psr.o \

	display/intel_quirks.o \

	display/intel_sprite.o \

	display/intel_tc.o

	display/intel_tc.o \

	display/intel_vga.o

i915-$(CONFIG_ACPI) += \

	display/intel_acpi.o \

	display/intel_opregion.o

drivers/gpu/drm/i915/display/intel_atomic.c

+14 −10
Original line number Diff line number Diff line
@@ -199,7 +199,6 @@ intel_crtc_duplicate_state(struct drm_crtc *crtc) 
	crtc_state->disable_cxsr = false;

	crtc_state->update_wm_pre = false;

	crtc_state->update_wm_post = false;

	crtc_state->fb_changed = false;

	crtc_state->fifo_changed = false;

	crtc_state->wm.need_postvbl_update = false;

	crtc_state->fb_bits = 0;
@@ -264,10 +263,13 @@ static void intel_atomic_setup_scaler(struct intel_crtc_scaler_state *scaler_sta 
			 */

			mode = PS_SCALER_MODE_NORMAL;

		} else {

			struct intel_plane *linked =

				plane_state->planar_linked_plane;



			mode = PS_SCALER_MODE_PLANAR;



			if (plane_state->linked_plane)

				mode |= PS_PLANE_Y_SEL(plane_state->linked_plane->id);

			if (linked)

				mode |= PS_PLANE_Y_SEL(linked->id);

		}

	} else if (INTEL_GEN(dev_priv) > 9 || IS_GEMINILAKE(dev_priv)) {

		mode = PS_SCALER_MODE_NORMAL;
@@ -371,6 +373,15 @@ int intel_atomic_setup_scalers(struct drm_i915_private *dev_priv, 
			 */

			if (!plane) {

				struct drm_plane_state *state;



				/*

				 * GLK+ scalers don't have a HQ mode so it

				 * isn't necessary to change between HQ and dyn mode

				 * on those platforms.

				 */

				if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))

					continue;



				plane = drm_plane_from_index(&dev_priv->drm, i);

				state = drm_atomic_get_plane_state(drm_state, plane);

				if (IS_ERR(state)) {
@@ -378,13 +389,6 @@ int intel_atomic_setup_scalers(struct drm_i915_private *dev_priv, 
						plane->base.id);

					return PTR_ERR(state);

				}



				/*

				 * the plane is added after plane checks are run,

				 * but since this plane is unchanged just do the

				 * minimum required validation.

				 */

				crtc_state->base.planes_changed = true;

			}



			intel_plane = to_intel_plane(plane);

drivers/gpu/drm/i915/display/intel_atomic_plane.c

+5 −4
Original line number Diff line number Diff line
@@ -144,6 +144,7 @@ int intel_plane_atomic_check_with_state(const struct intel_crtc_state *old_crtc_ 
					struct intel_plane_state *new_plane_state)

{

	struct intel_plane *plane = to_intel_plane(new_plane_state->base.plane);

	const struct drm_framebuffer *fb = new_plane_state->base.fb;

	int ret;



	new_crtc_state->active_planes &= ~BIT(plane->id);
@@ -164,11 +165,11 @@ int intel_plane_atomic_check_with_state(const struct intel_crtc_state *old_crtc_ 
		new_crtc_state->active_planes |= BIT(plane->id);



	if (new_plane_state->base.visible &&

	    is_planar_yuv_format(new_plane_state->base.fb->format->format))

	    drm_format_info_is_yuv_semiplanar(fb->format))

		new_crtc_state->nv12_planes |= BIT(plane->id);



	if (new_plane_state->base.visible &&

	    new_plane_state->base.fb->format->format == DRM_FORMAT_C8)

	    fb->format->format == DRM_FORMAT_C8)

		new_crtc_state->c8_planes |= BIT(plane->id);



	if (new_plane_state->base.visible || old_plane_state->base.visible)
@@ -320,9 +321,9 @@ void skl_update_planes_on_crtc(struct intel_atomic_state *state, 


		if (new_plane_state->base.visible) {

			intel_update_plane(plane, new_crtc_state, new_plane_state);

		} else if (new_plane_state->slave) {

		} else if (new_plane_state->planar_slave) {

			struct intel_plane *master =

				new_plane_state->linked_plane;

				new_plane_state->planar_linked_plane;



			/*

			 * We update the slave plane from this function because

drivers/gpu/drm/i915/display/intel_audio.c

+28 −8
Original line number Diff line number Diff line
@@ -560,8 +560,9 @@ static void ilk_audio_codec_disable(struct intel_encoder *encoder, 
	u32 tmp, eldv;

	i915_reg_t aud_config, aud_cntrl_st2;



	DRM_DEBUG_KMS("Disable audio codec on port %c, pipe %c\n",

		      port_name(port), pipe_name(pipe));

	DRM_DEBUG_KMS("Disable audio codec on [ENCODER:%d:%s], pipe %c\n",

		      encoder->base.base.id, encoder->base.name,

		      pipe_name(pipe));



	if (WARN_ON(port == PORT_A))

		return;
@@ -609,8 +610,9 @@ static void ilk_audio_codec_enable(struct intel_encoder *encoder, 
	int len, i;

	i915_reg_t hdmiw_hdmiedid, aud_config, aud_cntl_st, aud_cntrl_st2;



	DRM_DEBUG_KMS("Enable audio codec on port %c, pipe %c, %u bytes ELD\n",

		      port_name(port), pipe_name(pipe), drm_eld_size(eld));

	DRM_DEBUG_KMS("Enable audio codec on [ENCODER:%d:%s], pipe %c, %u bytes ELD\n",

		      encoder->base.base.id, encoder->base.name,

		      pipe_name(pipe), drm_eld_size(eld));



	if (WARN_ON(port == PORT_A))

		return;
@@ -850,11 +852,23 @@ static unsigned long i915_audio_component_get_power(struct device *kdev) 


	ret = intel_display_power_get(dev_priv, POWER_DOMAIN_AUDIO);



	/* Force CDCLK to 2*BCLK as long as we need audio to be powered. */

	if (dev_priv->audio_power_refcount++ == 0)

		if (IS_CANNONLAKE(dev_priv) || IS_GEMINILAKE(dev_priv))

	if (dev_priv->audio_power_refcount++ == 0) {

		if (IS_TIGERLAKE(dev_priv) || IS_ICELAKE(dev_priv)) {

			I915_WRITE(AUD_FREQ_CNTRL, dev_priv->audio_freq_cntrl);

			DRM_DEBUG_KMS("restored AUD_FREQ_CNTRL to 0x%x\n",

				      dev_priv->audio_freq_cntrl);

		}



		/* Force CDCLK to 2*BCLK as long as we need audio powered. */

		if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))

			glk_force_audio_cdclk(dev_priv, true);



		if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))

			I915_WRITE(AUD_PIN_BUF_CTL,

				   (I915_READ(AUD_PIN_BUF_CTL) |

				    AUD_PIN_BUF_ENABLE));

	}



	return ret;

}
@@ -865,7 +879,7 @@ static void i915_audio_component_put_power(struct device *kdev, 


	/* Stop forcing CDCLK to 2*BCLK if no need for audio to be powered. */

	if (--dev_priv->audio_power_refcount == 0)

		if (IS_CANNONLAKE(dev_priv) || IS_GEMINILAKE(dev_priv))

		if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))

			glk_force_audio_cdclk(dev_priv, false);



	intel_display_power_put(dev_priv, POWER_DOMAIN_AUDIO, cookie);
@@ -1114,6 +1128,12 @@ static void i915_audio_component_init(struct drm_i915_private *dev_priv) 
		return;

	}



	if (IS_TIGERLAKE(dev_priv) || IS_ICELAKE(dev_priv)) {

		dev_priv->audio_freq_cntrl = I915_READ(AUD_FREQ_CNTRL);

		DRM_DEBUG_KMS("init value of AUD_FREQ_CNTRL of 0x%x\n",

			      dev_priv->audio_freq_cntrl);

	}



	dev_priv->audio_component_registered = true;

}

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