Commit 97e7292a authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'clk' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc 

Pull arm-soc clk changes from Arnd Bergmann:
 "Clock support is moving to the clk subsystem.  These tegra, omap and
  imx changes are for code that is still platform specific and not (yet)
  part of that subsystem."

Fix up conflicts in arch/arm/mach-{imx/clk-imx51-imx53.c,omap2/Makefile}

* tag 'clk' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (23 commits)
  ARM: imx: clk-imx31: Fix clock id for rnga driver
  ARM: imx: add missing item to the list of clock event modes
  ARM: i.MX5x CSPI: Fixed clock name for CSPI
  ARM: i.MX5x clocks: Fix GPT clocks
  ARM: i.MX5x clocks: Fix parent for PWM clocks
  ARM: i.MX5x clocks: Add EPIT support
  ARM: mx27: Reenable silicon version print
  ARM: clk-imx27: Fix rtc clock id
  ARM: tegra: Provide clock for only one PWM controller
  ARM: tegra: Fix PWM clock programming
  ARM: OMAP3+: clock33xx: Add AM33XX clock tree data
  ARM: OMAP3+: clock: Move common clksel_rate & clock data to common file
  ARM: tegra: dma: rename driver name for clock to "tegra-apbdma"
  ARM: tegra: Remove second instance of uart clk
  crypto: add clk_prepare/clk_unprepare
  ASoC: tegra: add clk_prepare/clk_unprepare
  staging: nvec: add clk_prepare/clk_unprepare
  spi/tegra: add clk_prepare/clk_unprepare
  Input: tegra-kbc - add clk_prepare/clk_unprepare
  USB: ehci-tegra: add clk_prepare/clk_unprepare
  ...
parents a5ebba6b 36c678f3

arch/arm/mach-imx/clk-imx27.c

+3 −1
Original line number Diff line number Diff line
@@ -256,7 +256,7 @@ int __init mx27_clocks_init(unsigned long fref) 
	clk_register_clkdev(clk[gpio_ipg_gate], "gpio", NULL);

	clk_register_clkdev(clk[brom_ahb_gate], "brom", NULL);

	clk_register_clkdev(clk[ata_ahb_gate], "ata", NULL);

	clk_register_clkdev(clk[rtc_ipg_gate], "rtc", NULL);

	clk_register_clkdev(clk[rtc_ipg_gate], NULL, "mxc_rtc");

	clk_register_clkdev(clk[scc_ipg_gate], "scc", NULL);

	clk_register_clkdev(clk[cpu_div], "cpu", NULL);

	clk_register_clkdev(clk[emi_ahb_gate], "emi_ahb" , NULL);
@@ -267,6 +267,8 @@ int __init mx27_clocks_init(unsigned long fref) 


	clk_prepare_enable(clk[emi_ahb_gate]);



	imx_print_silicon_rev("i.MX27", mx27_revision());



	return 0;

}

arch/arm/mach-imx/clk-imx31.c

+2 −2
Original line number Diff line number Diff line
@@ -124,7 +124,7 @@ int __init mx31_clocks_init(unsigned long fref) 
	clk_register_clkdev(clk[cspi3_gate], NULL, "imx31-cspi.2");

	clk_register_clkdev(clk[pwm_gate], "pwm", NULL);

	clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0");

	clk_register_clkdev(clk[rtc_gate], "rtc", NULL);

	clk_register_clkdev(clk[rtc_gate], NULL, "mxc_rtc");

	clk_register_clkdev(clk[epit1_gate], "epit", NULL);

	clk_register_clkdev(clk[epit2_gate], "epit", NULL);

	clk_register_clkdev(clk[nfc], NULL, "mxc_nand.0");
@@ -166,7 +166,7 @@ int __init mx31_clocks_init(unsigned long fref) 
	clk_register_clkdev(clk[firi_gate], "firi", NULL);

	clk_register_clkdev(clk[ata_gate], NULL, "pata_imx");

	clk_register_clkdev(clk[rtic_gate], "rtic", NULL);

	clk_register_clkdev(clk[rng_gate], "rng", NULL);

	clk_register_clkdev(clk[rng_gate], NULL, "mxc_rnga");

	clk_register_clkdev(clk[sdma_gate], NULL, "imx31-sdma");

	clk_register_clkdev(clk[iim_gate], "iim", NULL);

arch/arm/mach-imx/clk-imx51-imx53.c

+16 −7
Original line number Diff line number Diff line
@@ -58,7 +58,7 @@ enum imx5_clks { 
	tve_s, uart1_ipg_gate, uart1_per_gate, uart2_ipg_gate,

	uart2_per_gate, uart3_ipg_gate, uart3_per_gate, i2c1_gate, i2c2_gate,

	gpt_ipg_gate, pwm1_ipg_gate, pwm1_hf_gate, pwm2_ipg_gate, pwm2_hf_gate,

	gpt_gate, fec_gate, usboh3_per_gate, esdhc1_ipg_gate, esdhc2_ipg_gate,

	gpt_hf_gate, fec_gate, usboh3_per_gate, esdhc1_ipg_gate, esdhc2_ipg_gate,

	esdhc3_ipg_gate, esdhc4_ipg_gate, ssi1_ipg_gate, ssi2_ipg_gate,

	ssi3_ipg_gate, ecspi1_ipg_gate, ecspi1_per_gate, ecspi2_ipg_gate,

	ecspi2_per_gate, cspi_ipg_gate, sdma_gate, emi_slow_gate, ipu_s,
@@ -81,6 +81,7 @@ enum imx5_clks { 
	ssi1_root_podf, ssi2_root_pred, ssi2_root_podf, ssi_ext1_pred,

	ssi_ext1_podf, ssi_ext2_pred, ssi_ext2_podf, ssi1_root_gate,

	ssi2_root_gate, ssi3_root_gate, ssi_ext1_gate, ssi_ext2_gate,

	epit1_ipg_gate, epit1_hf_gate, epit2_ipg_gate, epit2_hf_gate,

	clk_max

};
@@ -167,12 +168,12 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil, 
	clk[uart3_per_gate] = imx_clk_gate2("uart3_per_gate", "uart_root", MXC_CCM_CCGR1, 16);

	clk[i2c1_gate] = imx_clk_gate2("i2c1_gate", "per_root", MXC_CCM_CCGR1, 18);

	clk[i2c2_gate] = imx_clk_gate2("i2c2_gate", "per_root", MXC_CCM_CCGR1, 20);

	clk[gpt_ipg_gate] = imx_clk_gate2("gpt_ipg_gate", "ipg", MXC_CCM_CCGR2, 20);

	clk[pwm1_ipg_gate] = imx_clk_gate2("pwm1_ipg_gate", "ipg", MXC_CCM_CCGR2, 10);

	clk[pwm1_hf_gate] = imx_clk_gate2("pwm1_hf_gate", "ipg", MXC_CCM_CCGR2, 12);

	clk[pwm1_hf_gate] = imx_clk_gate2("pwm1_hf_gate", "per_root", MXC_CCM_CCGR2, 12);

	clk[pwm2_ipg_gate] = imx_clk_gate2("pwm2_ipg_gate", "ipg", MXC_CCM_CCGR2, 14);

	clk[pwm2_hf_gate] = imx_clk_gate2("pwm2_hf_gate", "ipg", MXC_CCM_CCGR2, 16);

	clk[gpt_gate] = imx_clk_gate2("gpt_gate", "per_root", MXC_CCM_CCGR2, 18);

	clk[pwm2_hf_gate] = imx_clk_gate2("pwm2_hf_gate", "per_root", MXC_CCM_CCGR2, 16);

	clk[gpt_ipg_gate] = imx_clk_gate2("gpt_ipg_gate", "ipg", MXC_CCM_CCGR2, 18);

	clk[gpt_hf_gate] = imx_clk_gate2("gpt_hf_gate", "per_root", MXC_CCM_CCGR2, 20);

	clk[fec_gate] = imx_clk_gate2("fec_gate", "ipg", MXC_CCM_CCGR2, 24);

	clk[usboh3_gate] = imx_clk_gate2("usboh3_gate", "ipg", MXC_CCM_CCGR2, 26);

	clk[usboh3_per_gate] = imx_clk_gate2("usboh3_per_gate", "usboh3_podf", MXC_CCM_CCGR2, 28);
@@ -226,13 +227,17 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil, 
	clk[ssi3_root_gate] = imx_clk_gate2("ssi3_root_gate", "ssi3_root_sel", MXC_CCM_CCGR3, 26);

	clk[ssi_ext1_gate] = imx_clk_gate2("ssi_ext1_gate", "ssi_ext1_com_sel", MXC_CCM_CCGR3, 28);

	clk[ssi_ext2_gate] = imx_clk_gate2("ssi_ext2_gate", "ssi_ext2_com_sel", MXC_CCM_CCGR3, 30);

	clk[epit1_ipg_gate] = imx_clk_gate2("epit1_ipg_gate", "ipg", MXC_CCM_CCGR2, 2);

	clk[epit1_hf_gate] = imx_clk_gate2("epit1_hf_gate", "per_root", MXC_CCM_CCGR2, 4);

	clk[epit2_ipg_gate] = imx_clk_gate2("epit2_ipg_gate", "ipg", MXC_CCM_CCGR2, 6);

	clk[epit2_hf_gate] = imx_clk_gate2("epit2_hf_gate", "per_root", MXC_CCM_CCGR2, 8);



	for (i = 0; i < ARRAY_SIZE(clk); i++)

		if (IS_ERR(clk[i]))

			pr_err("i.MX5 clk %d: register failed with %ld\n",

				i, PTR_ERR(clk[i]));

	

	clk_register_clkdev(clk[gpt_gate], "per", "imx-gpt.0");

	clk_register_clkdev(clk[gpt_hf_gate], "per", "imx-gpt.0");

	clk_register_clkdev(clk[gpt_ipg_gate], "ipg", "imx-gpt.0");

	clk_register_clkdev(clk[uart1_per_gate], "per", "imx21-uart.0");

	clk_register_clkdev(clk[uart1_ipg_gate], "ipg", "imx21-uart.0");
@@ -248,7 +253,7 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil, 
	clk_register_clkdev(clk[ecspi1_ipg_gate], "ipg", "imx51-ecspi.0");

	clk_register_clkdev(clk[ecspi2_per_gate], "per", "imx51-ecspi.1");

	clk_register_clkdev(clk[ecspi2_ipg_gate], "ipg", "imx51-ecspi.1");

	clk_register_clkdev(clk[cspi_ipg_gate], NULL, "imx51-cspi.0");

	clk_register_clkdev(clk[cspi_ipg_gate], NULL, "imx35-cspi.2");

	clk_register_clkdev(clk[pwm1_ipg_gate], "pwm", "mxc_pwm.0");

	clk_register_clkdev(clk[pwm2_ipg_gate], "pwm", "mxc_pwm.1");

	clk_register_clkdev(clk[i2c1_gate], NULL, "imx-i2c.0");
@@ -280,6 +285,10 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil, 
	clk_register_clkdev(clk[tve_gate], NULL, "imx-tve.0");

	clk_register_clkdev(clk[ipu_di1_gate], "di1", "imx-tve.0");

	clk_register_clkdev(clk[gpc_dvfs], "gpc_dvfs", NULL);

	clk_register_clkdev(clk[epit1_ipg_gate], "ipg", "imx-epit.0");

	clk_register_clkdev(clk[epit1_hf_gate], "per", "imx-epit.0");

	clk_register_clkdev(clk[epit2_ipg_gate], "ipg", "imx-epit.1");

	clk_register_clkdev(clk[epit2_hf_gate], "per", "imx-epit.1");



	/* Set SDHC parents to be PLL2 */

	clk_set_parent(clk[esdhc_a_sel], clk[pll2_sw]);

arch/arm/mach-omap2/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -172,6 +172,7 @@ obj-$(CONFIG_ARCH_OMAP3) += clkt_iclk.o 
obj-$(CONFIG_ARCH_OMAP4)		+= $(clock-common) clock44xx_data.o

obj-$(CONFIG_ARCH_OMAP4)		+= dpll3xxx.o dpll44xx.o

obj-$(CONFIG_SOC_AM33XX)		+= $(clock-common) dpll3xxx.o

obj-$(CONFIG_SOC_AM33XX)		+= clock33xx_data.o

obj-$(CONFIG_SOC_OMAP5)			+= $(clock-common)

obj-$(CONFIG_SOC_OMAP5)			+= dpll3xxx.o dpll44xx.o

arch/arm/mach-omap2/clock.h

+14 −0
Original line number Diff line number Diff line
@@ -155,4 +155,18 @@ extern const struct clkops clkops_omap3_noncore_dpll_ops; 
extern const struct clkops clkops_omap3_core_dpll_ops;

extern const struct clkops clkops_omap4_dpllmx_ops;



/* clksel_rate blocks shared between OMAP44xx and AM33xx */

extern const struct clksel_rate div_1_0_rates[];

extern const struct clksel_rate div_1_1_rates[];

extern const struct clksel_rate div_1_2_rates[];

extern const struct clksel_rate div_1_3_rates[];

extern const struct clksel_rate div_1_4_rates[];

extern const struct clksel_rate div31_1to31_rates[];



/* clocks shared between various OMAP SoCs */

extern struct clk virt_19200000_ck;

extern struct clk virt_26000000_ck;



extern int am33xx_clk_init(void);



#endif

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