drm/amd/pm: Removed fixed clock in auto mode DPM (97cf3299) · Commits · 戴 / test

drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c

+6 −4

Original line number	Diff line number	Diff line
		@@ -563,6 +563,8 @@ static int smu10_dpm_force_dpm_level(struct pp_hwmgr *hwmgr,
		struct smu10_hwmgr *data = hwmgr->backend;
		uint32_t min_sclk = hwmgr->display_config->min_core_set_clock;
		uint32_t min_mclk = hwmgr->display_config->min_mem_set_clock/100;
		uint32_t index_fclk = data->clock_vol_info.vdd_dep_on_fclk->count - 1;
		uint32_t index_socclk = data->clock_vol_info.vdd_dep_on_socclk->count - 1;

		if (hwmgr->smu_version < 0x1E3700) {
		pr_info("smu firmware version too old, can not set dpm level\n");
		@@ -676,13 +678,13 @@ static int smu10_dpm_force_dpm_level(struct pp_hwmgr *hwmgr,
		smum_send_msg_to_smc_with_parameter(hwmgr,
		PPSMC_MSG_SetHardMinFclkByFreq,
		hwmgr->display_config->num_display > 3 ?
		SMU10_UMD_PSTATE_PEAK_FCLK :
		data->clock_vol_info.vdd_dep_on_fclk->entries[0].clk :
		min_mclk,
		NULL);

		smum_send_msg_to_smc_with_parameter(hwmgr,
		PPSMC_MSG_SetHardMinSocclkByFreq,
		SMU10_UMD_PSTATE_MIN_SOCCLK,
		data->clock_vol_info.vdd_dep_on_socclk->entries[0].clk,
		NULL);
		smum_send_msg_to_smc_with_parameter(hwmgr,
		PPSMC_MSG_SetHardMinVcn,
		@@ -695,11 +697,11 @@ static int smu10_dpm_force_dpm_level(struct pp_hwmgr *hwmgr,
		NULL);
		smum_send_msg_to_smc_with_parameter(hwmgr,
		PPSMC_MSG_SetSoftMaxFclkByFreq,
		SMU10_UMD_PSTATE_PEAK_FCLK,
		data->clock_vol_info.vdd_dep_on_fclk->entries[index_fclk].clk,
		NULL);
		smum_send_msg_to_smc_with_parameter(hwmgr,
		PPSMC_MSG_SetSoftMaxSocclkByFreq,
		SMU10_UMD_PSTATE_PEAK_SOCCLK,
		data->clock_vol_info.vdd_dep_on_socclk->entries[index_socclk].clk,
		NULL);
		smum_send_msg_to_smc_with_parameter(hwmgr,
		PPSMC_MSG_SetSoftMaxVcn,

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