Commit 97a4e5c9 authored by Benjamin Herrenschmidt's avatar Benjamin Herrenschmidt
Browse files

fsi/fsi-master-gpio: Reduce turnaround clocks



FSI_GPIO_PRIME_SLAVE_CLOCKS is the number of clocks if the
"idle" phase between the end of a response and the beginning
of the next one. It corresponds to tSendDelay in the FSI
specification.

The default value in the slave is 16 clocks. 100 is way overkill
and significantly reduces the driver performance.

This changes it to 20 (which gives the HW a bit of margin still
just in case).

Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
Reviewed-by: default avatarChristopher Bostic <cbostic@linux.vnet.ibm.com>
Tested-by: default avatarJoel Stanley <joel@jms.id.au>
parent bc1099d2
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+1 −1
Original line number Diff line number Diff line
@@ -49,7 +49,7 @@
#define	FSI_GPIO_CRC_SIZE	4
#define	FSI_GPIO_MSG_ID_SIZE		2
#define	FSI_GPIO_MSG_RESPID_SIZE	2
#define	FSI_GPIO_PRIME_SLAVE_CLOCKS	100
#define	FSI_GPIO_PRIME_SLAVE_CLOCKS	20

struct fsi_master_gpio {
	struct fsi_master	master;