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clk: meson: stop rate propagation for audio clocks
It is actually a lot easier to setup the PLL with carefully chosen rates than relying on CCF clock propagation for this audio use case. This way, we can make sure we will always be able to provide the common audio clock rates, while having the PLL in the optimal operating range. For this, we stop the rate propagation at the mux picking the PLL and let it round to the closest matching PLL. Doing so, we can use the generic divider for the i2s clock. clk-audio-divider is no longer required. It was a (poor) attempt to use CCF rate propagation while making sure the PLL rate would be high enough to work with audio use cases. Acked-by:Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: