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Simplify the DMA restart logic to always queue up the next transfer immediately if there is at least one more byte available in the FIFO, so that the transfer will finish in a limited time. This way the driver stops to rely on zero length transfers to signal transfers ends. Those will go away when the idle detect DMA requests are disabled. Signed-off-by:Lucas Stach <l.stach@pengutronix.de> Acked-by:
Jiada Wang <jiada_wang@mentor.com> Signed-off-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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