drm/msm/mdp5: Add MDP5 configuration for SDM636/660 (974b7115) · Commits · 戴 / test

drivers/gpu/drm/msm/disp/mdp5/mdp5_cfg.c

+105 −0

Original line number	Diff line number	Diff line
		@@ -1002,6 +1002,110 @@ static const struct mdp5_cfg_hw sdm630_config = {
		.max_clk = 412500000,
		};

		static const struct mdp5_cfg_hw sdm660_config = {
		.name = "sdm660",
		.mdp = {
		.count = 1,
		.caps = MDP_CAP_DSC \|
		MDP_CAP_CDM \|
		MDP_CAP_SRC_SPLIT \|
		0,
		},
		.ctl = {
		.count = 5,
		.base = { 0x01000, 0x01200, 0x01400, 0x01600, 0x01800 },
		.flush_hw_mask = 0xf4ffffff,
		},
		.pipe_vig = {
		.count = 2,
		.base = { 0x04000, 0x6000 },
		.caps = MDP_PIPE_CAP_HFLIP \|
		MDP_PIPE_CAP_VFLIP \|
		MDP_PIPE_CAP_SCALE \|
		MDP_PIPE_CAP_CSC \|
		MDP_PIPE_CAP_DECIMATION \|
		MDP_PIPE_CAP_SW_PIX_EXT \|
		0,
		},
		.pipe_rgb = {
		.count = 4,
		.base = { 0x14000, 0x16000, 0x18000, 0x1a000 },
		.caps = MDP_PIPE_CAP_HFLIP \|
		MDP_PIPE_CAP_VFLIP \|
		MDP_PIPE_CAP_SCALE \|
		MDP_PIPE_CAP_DECIMATION \|
		MDP_PIPE_CAP_SW_PIX_EXT \|
		0,
		},
		.pipe_dma = {
		.count = 2, /* driver supports max of 2 currently */
		.base = { 0x24000, 0x26000, 0x28000 },
		.caps = MDP_PIPE_CAP_HFLIP \|
		MDP_PIPE_CAP_VFLIP \|
		MDP_PIPE_CAP_SW_PIX_EXT \|
		0,
		},
		.pipe_cursor = {
		.count = 1,
		.base = { 0x34000 },
		.caps = MDP_PIPE_CAP_HFLIP \|
		MDP_PIPE_CAP_VFLIP \|
		MDP_PIPE_CAP_SW_PIX_EXT \|
		MDP_PIPE_CAP_CURSOR \|
		0,
		},

		.lm = {
		.count = 4,
		.base = { 0x44000, 0x45000, 0x46000, 0x49000 },
		.instances = {
		{ .id = 0, .pp = 0, .dspp = 0,
		.caps = MDP_LM_CAP_DISPLAY \|
		MDP_LM_CAP_PAIR, },
		{ .id = 1, .pp = 1, .dspp = 1,
		.caps = MDP_LM_CAP_DISPLAY, },
		{ .id = 2, .pp = 2, .dspp = -1,
		.caps = MDP_LM_CAP_DISPLAY \|
		MDP_LM_CAP_PAIR, },
		{ .id = 3, .pp = 3, .dspp = -1,
		.caps = MDP_LM_CAP_WB, },
		},
		.nb_stages = 8,
		.max_width = 2560,
		.max_height = 0xFFFF,
		},
		.dspp = {
		.count = 2,
		.base = { 0x54000, 0x56000 },
		},
		.ad = {
		.count = 2,
		.base = { 0x78000, 0x78800 },
		},
		.pp = {
		.count = 5,
		.base = { 0x70000, 0x70800, 0x71000, 0x71800, 0x72000 },
		},
		.cdm = {
		.count = 1,
		.base = { 0x79200 },
		},
		.dsc = {
		.count = 2,
		.base = { 0x80000, 0x80400 },
		},
		.intf = {
		.base = { 0x6a000, 0x6a800, 0x6b000, 0x6b800 },
		.connect = {
		[0] = INTF_DISABLED,
		[1] = INTF_DSI,
		[2] = INTF_DSI,
		[3] = INTF_HDMI,
		},
		},
		.max_clk = 412500000,
		};

		static const struct mdp5_cfg_handler cfg_handlers_v1[] = {
		{ .revision = 0, .config = { .hw = &msm8x74v1_config } },
		{ .revision = 2, .config = { .hw = &msm8x74v2_config } },
		@@ -1016,6 +1120,7 @@ static const struct mdp5_cfg_handler cfg_handlers_v1[] = {

		static const struct mdp5_cfg_handler cfg_handlers_v3[] = {
		{ .revision = 0, .config = { .hw = &msm8998_config } },
		{ .revision = 2, .config = { .hw = &sdm660_config } },
		{ .revision = 3, .config = { .hw = &sdm630_config } },
		};

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