perf vendor events: Update POWER9 events (9749adc3) · Commits · 戴 / test

tools/perf/pmu-events/arch/powerpc/power9/cache.json

+0 −25

Original line number	Diff line number	Diff line
		@@ -19,11 +19,6 @@
		"EventName": "PM_CMPLU_STALL_FXU",
		"BriefDescription": "Finish stall due to a scalar fixed point or CR instruction in the execution pipeline. These instructions get routed to the ALU, ALU2, and DIV pipes"
		},
		{,
		"EventCode": "0x1D15C",
		"EventName": "PM_MRK_DTLB_MISS_1G",
		"BriefDescription": "Marked Data TLB reload (after a miss) page size 2M. Implies radix translation was used"
		},
		{,
		"EventCode": "0x4D12A",
		"EventName": "PM_MRK_DATA_FROM_RL4_CYC",
		@@ -79,21 +74,6 @@
		"EventName": "PM_THRESH_EXC_4096",
		"BriefDescription": "Threshold counter exceed a count of 4096"
		},
		{,
		"EventCode": "0x3D156",
		"EventName": "PM_MRK_DTLB_MISS_64K",
		"BriefDescription": "Marked Data TLB Miss page size 64K"
		},
		{,
		"EventCode": "0x4C15E",
		"EventName": "PM_MRK_DTLB_MISS_16M",
		"BriefDescription": "Marked Data TLB Miss page size 16M"
		},
		{,
		"EventCode": "0x2D15E",
		"EventName": "PM_MRK_DTLB_MISS_16G",
		"BriefDescription": "Marked Data TLB Miss page size 16G"
		},
		{,
		"EventCode": "0x3F14A",
		"EventName": "PM_MRK_DPTEG_FROM_RMEM",
		@@ -123,10 +103,5 @@
		"EventCode": "0x1002A",
		"EventName": "PM_CMPLU_STALL_LARX",
		"BriefDescription": "Finish stall because the NTF instruction was a larx waiting to be satisfied"
		},
		{,
		"EventCode": "0x1C058",
		"EventName": "PM_DTLB_MISS_16G",
		"BriefDescription": "Data TLB Miss page size 16G"
		}
		]
		No newline at end of file

+0 −10

Original line number	Diff line number	Diff line
		@@ -154,11 +154,6 @@
		"EventName": "PM_MRK_DATA_FROM_RL2L3_SHR_CYC",
		"BriefDescription": "Duration in cycles to reload with Shared (S) data from another chip's L2 or L3 on the same Node or Group (Remote), as this chip due to a marked load"
		},
		{,
		"EventCode": "0x3C056",
		"EventName": "PM_DTLB_MISS_64K",
		"BriefDescription": "Data TLB Miss page size 64K"
		},
		{,
		"EventCode": "0x30060",
		"EventName": "PM_TM_TRANS_RUN_INST",
		@@ -344,11 +339,6 @@
		"EventName": "PM_MRK_LARX_FIN",
		"BriefDescription": "Larx finished"
		},
		{,
		"EventCode": "0x4C056",
		"EventName": "PM_DTLB_MISS_16M",
		"BriefDescription": "Data TLB Miss page size 16M"
		},
		{,
		"EventCode": "0x1003A",
		"EventName": "PM_CMPLU_STALL_LSU_FIN",

+0 −5

Original line number	Diff line number	Diff line
		@@ -529,11 +529,6 @@
		"EventName": "PM_L1_ICACHE_RELOADED_ALL",
		"BriefDescription": "Counts all Icache reloads includes demand, prefetch, prefetch turned into demand and demand turned into prefetch"
		},
		{,
		"EventCode": "0x4003C",
		"EventName": "PM_DISP_HELD_SYNC_HOLD",
		"BriefDescription": "Cycles in which dispatch is held because of a synchronizing instruction in the pipeline"
		},
		{,
		"EventCode": "0x3003C",
		"EventName": "PM_CMPLU_STALL_NESTED_TEND",

+0 −5

Original line number	Diff line number	Diff line
		@@ -44,11 +44,6 @@
		"EventName": "PM_LD_CMPL",
		"BriefDescription": "count of Loads completed"
		},
		{,
		"EventCode": "0x2D156",
		"EventName": "PM_MRK_DTLB_MISS_4K",
		"BriefDescription": "Marked Data TLB Miss page size 4k"
		},
		{,
		"EventCode": "0x4C042",
		"EventName": "PM_DATA_FROM_L3",

+158 −83

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