Commit 97334883 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'v4.21-rockchip-dts32-1' of... 

Merge tag 'v4.21-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

Powerdomain and QoS nodes for rk3066 and rk3188. A fix for a rock2
regulator name and referencing all cpus in the cooling maps instead
of only cpu0.

* tag 'v4.21-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip

:
  ARM: dts: rockchip: Add all CPUs in cooling maps
  ARM: dts: rockchip: Fix rk3288-rock2 vcc_flash name
  ARM: dts: rockchip: add rk3066/rk3188 power-domains
  ARM: dts: rockchip: add qos nodes found on rk3066 and rk3188
  dt-bindings: add power-domain header for RK3066 SoCs
  dt-bindings: add power-domain header for RK3188 SoCs

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 11c99479 99935bd4

arch/arm/boot/dts/rk3066a.dtsi

+52 −0
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ 
#include <dt-bindings/gpio/gpio.h>

#include <dt-bindings/pinctrl/rockchip.h>

#include <dt-bindings/clock/rk3066a-cru.h>

#include <dt-bindings/power/rk3066-power.h>

#include "rk3xxx.dtsi"



/ {
@@ -595,6 +596,7 @@ 
			  "ppmmu2",

			  "pp3",

			  "ppmmu3";

	power-domains = <&power RK3066_PD_GPU>;

};



&i2c0 {
@@ -643,6 +645,56 @@ 
	dma-names = "rx-tx";

};



&pmu {

	power: power-controller {

		compatible = "rockchip,rk3066-power-controller";

		#power-domain-cells = <1>;

		#address-cells = <1>;

		#size-cells = <0>;



		pd_vio@RK3066_PD_VIO {

			reg = <RK3066_PD_VIO>;

			clocks = <&cru ACLK_LCDC0>,

				 <&cru ACLK_LCDC1>,

				 <&cru DCLK_LCDC0>,

				 <&cru DCLK_LCDC1>,

				 <&cru HCLK_LCDC0>,

				 <&cru HCLK_LCDC1>,

				 <&cru SCLK_CIF1>,

				 <&cru ACLK_CIF1>,

				 <&cru HCLK_CIF1>,

				 <&cru SCLK_CIF0>,

				 <&cru ACLK_CIF0>,

				 <&cru HCLK_CIF0>,

				 <&cru ACLK_IPP>,

				 <&cru HCLK_IPP>,

				 <&cru ACLK_RGA>,

				 <&cru HCLK_RGA>;

			pm_qos = <&qos_lcdc0>,

				 <&qos_lcdc1>,

				 <&qos_cif0>,

				 <&qos_cif1>,

				 <&qos_ipp>,

				 <&qos_rga>;

		};



		pd_video@RK3066_PD_VIDEO {

			reg = <RK3066_PD_VIDEO>;

			clocks = <&cru ACLK_VDPU>,

				 <&cru ACLK_VEPU>,

				 <&cru HCLK_VDPU>,

				 <&cru HCLK_VEPU>;

			pm_qos = <&qos_vpu>;

		};



		pd_gpu@RK3066_PD_GPU {

			reg = <RK3066_PD_GPU>;

			clocks = <&cru ACLK_GPU>;

			pm_qos = <&qos_gpu>;

		};

	};

};



&pwm0 {

	pinctrl-names = "default";

	pinctrl-0 = <&pwm0_out>;

arch/arm/boot/dts/rk3188.dtsi

+51 −0
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ 
#include <dt-bindings/gpio/gpio.h>

#include <dt-bindings/pinctrl/rockchip.h>

#include <dt-bindings/clock/rk3188-cru.h>

#include <dt-bindings/power/rk3188-power.h>

#include "rk3xxx.dtsi"



/ {
@@ -80,6 +81,7 @@ 
		interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cru ACLK_LCDC0>, <&cru DCLK_LCDC0>, <&cru HCLK_LCDC0>;

		clock-names = "aclk_vop", "dclk_vop", "hclk_vop";

		power-domains = <&power RK3188_PD_VIO>;

		resets = <&cru SRST_LCDC0_AXI>, <&cru SRST_LCDC0_AHB>, <&cru SRST_LCDC0_DCLK>;

		reset-names = "axi", "ahb", "dclk";

		status = "disabled";
@@ -96,6 +98,7 @@ 
		interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cru ACLK_LCDC1>, <&cru DCLK_LCDC1>, <&cru HCLK_LCDC1>;

		clock-names = "aclk_vop", "dclk_vop", "hclk_vop";

		power-domains = <&power RK3188_PD_VIO>;

		resets = <&cru SRST_LCDC1_AXI>, <&cru SRST_LCDC1_AHB>, <&cru SRST_LCDC1_DCLK>;

		reset-names = "axi", "ahb", "dclk";

		status = "disabled";
@@ -620,6 +623,7 @@ 
			  "ppmmu2",

			  "pp3",

			  "ppmmu3";

	power-domains = <&power RK3188_PD_GPU>;

};



&i2c0 {
@@ -652,6 +656,53 @@ 
	pinctrl-0 = <&i2c4_xfer>;

};



&pmu {

	power: power-controller {

		compatible = "rockchip,rk3188-power-controller";

		#power-domain-cells = <1>;

		#address-cells = <1>;

		#size-cells = <0>;



		pd_vio@RK3188_PD_VIO {

			reg = <RK3188_PD_VIO>;

			clocks = <&cru ACLK_LCDC0>,

				 <&cru ACLK_LCDC1>,

				 <&cru DCLK_LCDC0>,

				 <&cru DCLK_LCDC1>,

				 <&cru HCLK_LCDC0>,

				 <&cru HCLK_LCDC1>,

				 <&cru SCLK_CIF0>,

				 <&cru ACLK_CIF0>,

				 <&cru HCLK_CIF0>,

				 <&cru ACLK_IPP>,

				 <&cru HCLK_IPP>,

				 <&cru ACLK_RGA>,

				 <&cru HCLK_RGA>;

			pm_qos = <&qos_lcdc0>,

				 <&qos_lcdc1>,

				 <&qos_cif0>,

				 <&qos_cif1>,

				 <&qos_ipp>,

				 <&qos_rga>;

		};



		pd_video@RK3188_PD_VIDEO {

			reg = <RK3188_PD_VIDEO>;

			clocks = <&cru ACLK_VDPU>,

				 <&cru ACLK_VEPU>,

				 <&cru HCLK_VDPU>,

				 <&cru HCLK_VEPU>;

			pm_qos = <&qos_vpu>;

		};



		pd_gpu@RK3188_PD_GPU {

			reg = <RK3188_PD_GPU>;

			clocks = <&cru ACLK_GPU>;

			pm_qos = <&qos_gpu>;

		};

	};

};



&pwm0 {

	pinctrl-names = "default";

	pinctrl-0 = <&pwm0_out>;

arch/arm/boot/dts/rk322x.dtsi

+8 −2
Original line number Diff line number Diff line
@@ -493,12 +493,18 @@ 
				map0 {

					trip = <&cpu_alert0>;

					cooling-device =

						<&cpu0 THERMAL_NO_LIMIT 6>;

						<&cpu0 THERMAL_NO_LIMIT 6>,

						<&cpu1 THERMAL_NO_LIMIT 6>,

						<&cpu2 THERMAL_NO_LIMIT 6>,

						<&cpu3 THERMAL_NO_LIMIT 6>;

				};

				map1 {

					trip = <&cpu_alert1>;

					cooling-device =

						<&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;

						<&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,

						<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,

						<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,

						<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;

				};

			};

		};

arch/arm/boot/dts/rk3288-rock2-som.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -25,7 +25,7 @@ 


	vcc_flash: flash-regulator {

		compatible = "regulator-fixed";

		regulator-name = "vcc_sys";

		regulator-name = "vcc_flash";

		regulator-min-microvolt = <1800000>;

		regulator-max-microvolt = <1800000>;

		startup-delay-us = <150>;

arch/arm/boot/dts/rk3288-veyron-mickey.dts

+14 −10
Original line number Diff line number Diff line
@@ -81,8 +81,10 @@ 
		 */

		cpu_warm_limit_cpu {

			trip = <&cpu_alert_warm>;

			cooling-device =

				<&cpu0 THERMAL_NO_LIMIT 4>;

			cooling-device = <&cpu0 THERMAL_NO_LIMIT 4>,

					 <&cpu1 THERMAL_NO_LIMIT 4>,

					 <&cpu2 THERMAL_NO_LIMIT 4>,

					 <&cpu3 THERMAL_NO_LIMIT 4>;

		};



		/*
@@ -103,23 +105,25 @@ 
		 */

		cpu_almost_hot_limit_cpu {

			trip = <&cpu_alert_almost_hot>;

			cooling-device =

				<&cpu0 5 6>;

			cooling-device = <&cpu0 5 6>, <&cpu1 5 6>, <&cpu2 5 6>,

					 <&cpu3 5 6>;

		};

		cpu_hot_limit_cpu {

			trip = <&cpu_alert_hot>;

			cooling-device =

				<&cpu0 7 7>;

			cooling-device = <&cpu0 7 7>, <&cpu1 7 7>, <&cpu2 7 7>,

					 <&cpu3 7 7>;

		};

		cpu_hotter_limit_cpu {

			trip = <&cpu_alert_hotter>;

			cooling-device =

				<&cpu0 7 8>;

			cooling-device = <&cpu0 7 8>, <&cpu1 7 8>, <&cpu2 7 8>,

					 <&cpu3 7 8>;

		};

		cpu_very_hot_limit_cpu {

			trip = <&cpu_alert_very_hot>;

			cooling-device =

				<&cpu0 8 THERMAL_NO_LIMIT>;

			cooling-device = <&cpu0 8 THERMAL_NO_LIMIT>,

					 <&cpu1 8 THERMAL_NO_LIMIT>,

					 <&cpu2 8 THERMAL_NO_LIMIT>,

					 <&cpu3 8 THERMAL_NO_LIMIT>;

		};

	};

};

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