Commit 9716e57a authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'locking-urgent-2020-06-11' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull atomics rework from Thomas Gleixner:
 "Peter Zijlstras rework of atomics and fallbacks. This solves two
  problems:

   1) Compilers uninline small atomic_* static inline functions which
      can expose them to instrumentation.

   2) The instrumentation of atomic primitives was done at the
      architecture level while composites or fallbacks were provided at
      the generic level. As a result there are no uninstrumented
      variants of the fallbacks.

  Both issues were in the way of fully isolating fragile entry code
  pathes and especially the text poke int3 handler which is prone to an
  endless recursion problem when anything in that code path is about to
  be instrumented. This was always a problem, but got elevated due to
  the new batch mode updates of tracing.

  The solution is to mark the functions __always_inline and to flip the
  fallback and instrumentation so the non-instrumented variants are at
  the architecture level and the instrumentation is done in generic
  code.

  The latter introduces another fallback variant which will go away once
  all architectures have been moved over to arch_atomic_*"

* tag 'locking-urgent-2020-06-11' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  locking/atomics: Flip fallbacks and instrumentation
  asm-generic/atomic: Use __always_inline for fallback wrappers
parents b1a62749 37f8173d

arch/arm64/include/asm/atomic.h

+3 −3
Original line number Diff line number Diff line
@@ -101,8 +101,8 @@ static inline long arch_atomic64_dec_if_positive(atomic64_t *v) 


#define ATOMIC_INIT(i)	{ (i) }



#define arch_atomic_read(v)			READ_ONCE((v)->counter)

#define arch_atomic_set(v, i)			WRITE_ONCE(((v)->counter), (i))

#define arch_atomic_read(v)			__READ_ONCE((v)->counter)

#define arch_atomic_set(v, i)			__WRITE_ONCE(((v)->counter), (i))



#define arch_atomic_add_return_relaxed		arch_atomic_add_return_relaxed

#define arch_atomic_add_return_acquire		arch_atomic_add_return_acquire
@@ -225,6 +225,6 @@ static inline long arch_atomic64_dec_if_positive(atomic64_t *v) 


#define arch_atomic64_dec_if_positive		arch_atomic64_dec_if_positive



#include <asm-generic/atomic-instrumented.h>

#define ARCH_ATOMIC



#endif /* __ASM_ATOMIC_H */

arch/x86/include/asm/atomic.h

+13 −4
Original line number Diff line number Diff line
@@ -28,7 +28,7 @@ static __always_inline int arch_atomic_read(const atomic_t *v) 
	 * Note for KASAN: we deliberately don't use READ_ONCE_NOCHECK() here,

	 * it's non-inlined function that increases binary size and stack usage.

	 */

	return READ_ONCE((v)->counter);

	return __READ_ONCE((v)->counter);

}



/**
@@ -40,7 +40,7 @@ static __always_inline int arch_atomic_read(const atomic_t *v) 
 */

static __always_inline void arch_atomic_set(atomic_t *v, int i)

{

	WRITE_ONCE(v->counter, i);

	__WRITE_ONCE(v->counter, i);

}



/**
@@ -166,6 +166,7 @@ static __always_inline int arch_atomic_add_return(int i, atomic_t *v) 
{

	return i + xadd(&v->counter, i);

}

#define arch_atomic_add_return arch_atomic_add_return



/**

 * arch_atomic_sub_return - subtract integer and return
@@ -178,32 +179,37 @@ static __always_inline int arch_atomic_sub_return(int i, atomic_t *v) 
{

	return arch_atomic_add_return(-i, v);

}

#define arch_atomic_sub_return arch_atomic_sub_return



static __always_inline int arch_atomic_fetch_add(int i, atomic_t *v)

{

	return xadd(&v->counter, i);

}

#define arch_atomic_fetch_add arch_atomic_fetch_add



static __always_inline int arch_atomic_fetch_sub(int i, atomic_t *v)

{

	return xadd(&v->counter, -i);

}

#define arch_atomic_fetch_sub arch_atomic_fetch_sub



static __always_inline int arch_atomic_cmpxchg(atomic_t *v, int old, int new)

{

	return arch_cmpxchg(&v->counter, old, new);

}

#define arch_atomic_cmpxchg arch_atomic_cmpxchg



#define arch_atomic_try_cmpxchg arch_atomic_try_cmpxchg

static __always_inline bool arch_atomic_try_cmpxchg(atomic_t *v, int *old, int new)

{

	return try_cmpxchg(&v->counter, old, new);

}

#define arch_atomic_try_cmpxchg arch_atomic_try_cmpxchg



static inline int arch_atomic_xchg(atomic_t *v, int new)

{

	return arch_xchg(&v->counter, new);

}

#define arch_atomic_xchg arch_atomic_xchg



static inline void arch_atomic_and(int i, atomic_t *v)

{
@@ -221,6 +227,7 @@ static inline int arch_atomic_fetch_and(int i, atomic_t *v) 


	return val;

}

#define arch_atomic_fetch_and arch_atomic_fetch_and



static inline void arch_atomic_or(int i, atomic_t *v)

{
@@ -238,6 +245,7 @@ static inline int arch_atomic_fetch_or(int i, atomic_t *v) 


	return val;

}

#define arch_atomic_fetch_or arch_atomic_fetch_or



static inline void arch_atomic_xor(int i, atomic_t *v)

{
@@ -255,6 +263,7 @@ static inline int arch_atomic_fetch_xor(int i, atomic_t *v) 


	return val;

}

#define arch_atomic_fetch_xor arch_atomic_fetch_xor



#ifdef CONFIG_X86_32

# include <asm/atomic64_32.h>
@@ -262,6 +271,6 @@ static inline int arch_atomic_fetch_xor(int i, atomic_t *v) 
# include <asm/atomic64_64.h>

#endif



#include <asm-generic/atomic-instrumented.h>

#define ARCH_ATOMIC



#endif /* _ASM_X86_ATOMIC_H */

arch/x86/include/asm/atomic64_32.h

+9 −0
Original line number Diff line number Diff line
@@ -75,6 +75,7 @@ static inline s64 arch_atomic64_cmpxchg(atomic64_t *v, s64 o, s64 n) 
{

	return arch_cmpxchg64(&v->counter, o, n);

}

#define arch_atomic64_cmpxchg arch_atomic64_cmpxchg



/**

 * arch_atomic64_xchg - xchg atomic64 variable
@@ -94,6 +95,7 @@ static inline s64 arch_atomic64_xchg(atomic64_t *v, s64 n) 
			     : "memory");

	return o;

}

#define arch_atomic64_xchg arch_atomic64_xchg



/**

 * arch_atomic64_set - set atomic64 variable
@@ -138,6 +140,7 @@ static inline s64 arch_atomic64_add_return(s64 i, atomic64_t *v) 
			     ASM_NO_INPUT_CLOBBER("memory"));

	return i;

}

#define arch_atomic64_add_return arch_atomic64_add_return



/*

 * Other variants with different arithmetic operators:
@@ -149,6 +152,7 @@ static inline s64 arch_atomic64_sub_return(s64 i, atomic64_t *v) 
			     ASM_NO_INPUT_CLOBBER("memory"));

	return i;

}

#define arch_atomic64_sub_return arch_atomic64_sub_return



static inline s64 arch_atomic64_inc_return(atomic64_t *v)

{
@@ -242,6 +246,7 @@ static inline int arch_atomic64_add_unless(atomic64_t *v, s64 a, s64 u) 
			     "S" (v) : "memory");

	return (int)a;

}

#define arch_atomic64_add_unless arch_atomic64_add_unless



static inline int arch_atomic64_inc_not_zero(atomic64_t *v)

{
@@ -281,6 +286,7 @@ static inline s64 arch_atomic64_fetch_and(s64 i, atomic64_t *v) 


	return old;

}

#define arch_atomic64_fetch_and arch_atomic64_fetch_and



static inline void arch_atomic64_or(s64 i, atomic64_t *v)

{
@@ -299,6 +305,7 @@ static inline s64 arch_atomic64_fetch_or(s64 i, atomic64_t *v) 


	return old;

}

#define arch_atomic64_fetch_or arch_atomic64_fetch_or



static inline void arch_atomic64_xor(s64 i, atomic64_t *v)

{
@@ -317,6 +324,7 @@ static inline s64 arch_atomic64_fetch_xor(s64 i, atomic64_t *v) 


	return old;

}

#define arch_atomic64_fetch_xor arch_atomic64_fetch_xor



static inline s64 arch_atomic64_fetch_add(s64 i, atomic64_t *v)

{
@@ -327,6 +335,7 @@ static inline s64 arch_atomic64_fetch_add(s64 i, atomic64_t *v) 


	return old;

}

#define arch_atomic64_fetch_add arch_atomic64_fetch_add



#define arch_atomic64_fetch_sub(i, v)	arch_atomic64_fetch_add(-(i), (v))

arch/x86/include/asm/atomic64_64.h

+12 −3
Original line number Diff line number Diff line
@@ -19,7 +19,7 @@ 
 */

static inline s64 arch_atomic64_read(const atomic64_t *v)

{

	return READ_ONCE((v)->counter);

	return __READ_ONCE((v)->counter);

}



/**
@@ -31,7 +31,7 @@ static inline s64 arch_atomic64_read(const atomic64_t *v) 
 */

static inline void arch_atomic64_set(atomic64_t *v, s64 i)

{

	WRITE_ONCE(v->counter, i);

	__WRITE_ONCE(v->counter, i);

}



/**
@@ -159,37 +159,43 @@ static __always_inline s64 arch_atomic64_add_return(s64 i, atomic64_t *v) 
{

	return i + xadd(&v->counter, i);

}

#define arch_atomic64_add_return arch_atomic64_add_return



static inline s64 arch_atomic64_sub_return(s64 i, atomic64_t *v)

{

	return arch_atomic64_add_return(-i, v);

}

#define arch_atomic64_sub_return arch_atomic64_sub_return



static inline s64 arch_atomic64_fetch_add(s64 i, atomic64_t *v)

{

	return xadd(&v->counter, i);

}

#define arch_atomic64_fetch_add arch_atomic64_fetch_add



static inline s64 arch_atomic64_fetch_sub(s64 i, atomic64_t *v)

{

	return xadd(&v->counter, -i);

}

#define arch_atomic64_fetch_sub arch_atomic64_fetch_sub



static inline s64 arch_atomic64_cmpxchg(atomic64_t *v, s64 old, s64 new)

{

	return arch_cmpxchg(&v->counter, old, new);

}

#define arch_atomic64_cmpxchg arch_atomic64_cmpxchg



#define arch_atomic64_try_cmpxchg arch_atomic64_try_cmpxchg

static __always_inline bool arch_atomic64_try_cmpxchg(atomic64_t *v, s64 *old, s64 new)

{

	return try_cmpxchg(&v->counter, old, new);

}

#define arch_atomic64_try_cmpxchg arch_atomic64_try_cmpxchg



static inline s64 arch_atomic64_xchg(atomic64_t *v, s64 new)

{

	return arch_xchg(&v->counter, new);

}

#define arch_atomic64_xchg arch_atomic64_xchg



static inline void arch_atomic64_and(s64 i, atomic64_t *v)

{
@@ -207,6 +213,7 @@ static inline s64 arch_atomic64_fetch_and(s64 i, atomic64_t *v) 
	} while (!arch_atomic64_try_cmpxchg(v, &val, val & i));

	return val;

}

#define arch_atomic64_fetch_and arch_atomic64_fetch_and



static inline void arch_atomic64_or(s64 i, atomic64_t *v)

{
@@ -224,6 +231,7 @@ static inline s64 arch_atomic64_fetch_or(s64 i, atomic64_t *v) 
	} while (!arch_atomic64_try_cmpxchg(v, &val, val | i));

	return val;

}

#define arch_atomic64_fetch_or arch_atomic64_fetch_or



static inline void arch_atomic64_xor(s64 i, atomic64_t *v)

{
@@ -241,5 +249,6 @@ static inline s64 arch_atomic64_fetch_xor(s64 i, atomic64_t *v) 
	} while (!arch_atomic64_try_cmpxchg(v, &val, val ^ i));

	return val;

}

#define arch_atomic64_fetch_xor arch_atomic64_fetch_xor



#endif /* _ASM_X86_ATOMIC64_64_H */

include/linux/atomic-arch-fallback.h

0 → 100644
+2291 −0

File added.

Preview size limit exceeded, changes collapsed.

CRA Git | Maintained and supported by SUSTech CRA and CCSE