Commit 96851d39 authored by Andre Przywara's avatar Andre Przywara Committed by Linus Walleij
Browse files

drivers: pinctrl: add driver for Allwinner A64 SoC 



Based on the Allwinner A64 user manual and on the previous sunxi
pinctrl drivers this introduces the pin multiplex assignments for
the ARMv8 Allwinner A64 SoC.
Port A is apparently used for the fixed function DRAM controller, so
the ports start at B here (the manual mentions "n from 1 to 7", so
not starting at 0).

Signed-off-by: default avatarAndre Przywara <andre.przywara@arm.com>
Acked-by: default avatarRob Herring <robh@kernel.org>
Acked-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent cc998d8b

Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt

+1 −0
Original line number Diff line number Diff line
@@ -22,6 +22,7 @@ Required properties: 
  "allwinner,sun8i-a83t-pinctrl"

  "allwinner,sun8i-h3-pinctrl"

  "allwinner,sun8i-h3-r-pinctrl"

  "allwinner,sun50i-a64-pinctrl"



- reg: Should contain the register physical address and length for the

  pin controller.

drivers/pinctrl/sunxi/Kconfig

+4 −0
Original line number Diff line number Diff line
@@ -68,4 +68,8 @@ config PINCTRL_SUN9I_A80_R 
	depends on RESET_CONTROLLER

	select PINCTRL_SUNXI



config PINCTRL_SUN50I_A64

	bool

	select PINCTRL_SUNXI



endif

drivers/pinctrl/sunxi/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -12,6 +12,7 @@ obj-$(CONFIG_PINCTRL_SUN7I_A20) += pinctrl-sun7i-a20.o 
obj-$(CONFIG_PINCTRL_SUN8I_A23)		+= pinctrl-sun8i-a23.o

obj-$(CONFIG_PINCTRL_SUN8I_A23_R)	+= pinctrl-sun8i-a23-r.o

obj-$(CONFIG_PINCTRL_SUN8I_A33)		+= pinctrl-sun8i-a33.o

obj-$(CONFIG_PINCTRL_SUN50I_A64)	+= pinctrl-sun50i-a64.o

obj-$(CONFIG_PINCTRL_SUN8I_A83T)	+= pinctrl-sun8i-a83t.o

obj-$(CONFIG_PINCTRL_SUN8I_H3)		+= pinctrl-sun8i-h3.o

obj-$(CONFIG_PINCTRL_SUN8I_H3_R)	+= pinctrl-sun8i-h3-r.o

drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c

0 → 100644
+601 −0

File added.

Preview size limit exceeded, changes collapsed.

CRA Git | Maintained and supported by SUSTech CRA and CCSE