Commit 955d8f3e authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'omap-for-v5.6/ti-sysc-drop-pdata-crypto-signed' of...

Merge tag 'omap-for-v5.6/ti-sysc-drop-pdata-crypto-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/late

Late changes for omap secure accelerators for v5.6 merge window

A series of changes to configure secure accelerators for omap4 & 5
to finally get hardware random number generator working.

Apologies on a late pull request on these changes, but this pull
request could not be sent out earlier because of a dependency to
recent clock changes. This is based on earlier changes to drop omap
legacy platform data with Tero Kristo's for-5.6-ti-clk branch merged
in.

* tag 'omap-for-v5.6/ti-sysc-drop-pdata-crypto-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (98 commits)
  ARM: OMAP2+: Drop legacy platform data for omap4 des
  ARM: OMAP2+: Drop legacy platform data for omap4 sham
  ARM: OMAP2+: Drop legacy platform data for omap4 aes
  ARM: dts: Configure interconnect target module for omap4 des
  ARM: dts: Configure interconnect target module for omap4 aes
  ARM: dts: Configure interconnect target module for omap4 sham
  ARM: dts: Configure omap5 rng to probe with ti-sysc
  ARM: dts: Configure omap4 rng to probe with ti-sysc
  ARM: dts: Add missing omap5 secure clocks
  ARM: dts: Add missing omap4 secure clocks
  clk: ti: clkctrl: Fix hidden dependency to node name
  clk: ti: add clkctrl data dra7 sgx
  clk: ti: omap5: Add missing AESS clock
  clk: ti: dra7: fix parent for gmac_clkctrl
  clk: ti: dra7: add vpe clkctrl data
  clk: ti: dra7: add cam clkctrl data
  dt-bindings: clock: Move ti-dra7-atl.h to dt-bindings/clock
  dmaengine: ti: omap-dma: don't allow a null od->plat pointer to be dereferenced
  ARM: OMAP2+: Drop legacy platform data for sdma
  ARM: OMAP2+: Drop legacy init for sdma
  ...

Link: https://lore.kernel.org/r/pull-1579896427-50330@atomide.com-2


Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents d1eef1c6 885d21e4
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+8 −3
Original line number Diff line number Diff line
@@ -16,18 +16,23 @@ For more information, please see the Linux clock framework binding at
Documentation/devicetree/bindings/clock/clock-bindings.txt.

Required properties :
- compatible : shall be "ti,clkctrl"
- compatible : shall be "ti,clkctrl" or a clock domain specific name:
	       "ti,clkctrl-l4-cfg"
	       "ti,clkctrl-l4-per"
	       "ti,clkctrl-l4-secure"
	       "ti,clkctrl-l4-wkup"
- #clock-cells : shall contain 2 with the first entry being the instance
		 offset from the clock domain base and the second being the
		 clock index
- reg : clock registers

Example: Clock controller node on omap 4430:

&cm2 {
	l4per: cm@1400 {
		cm_l4per@0 {
			cm_l4per_clkctrl: clk@20 {
				compatible = "ti,clkctrl";
			cm_l4per_clkctrl: clock@20 {
				compatible = "ti,clkctrl-l4-per", "ti,clkctrl";
				reg = <0x20 0x1b0>;
				#clock-cells = <2>;
			};
+2 −2
Original line number Diff line number Diff line
@@ -43,7 +43,7 @@ Configuration of ATL instances:
	- aws : Audio word select signal selection
};

For valid word select signals, see the dt-bindings/clk/ti-dra7-atl.h include
For valid word select signals, see the dt-bindings/clock/ti-dra7-atl.h include
file.

Examples:
@@ -83,7 +83,7 @@ atl: atl@4843c000 {
	clock-names = "fck";
};

#include <dt-bindings/clk/ti-dra7-atl.h>
#include <dt-bindings/clock/ti-dra7-atl.h>

&atl {

+1 −1
Original line number Diff line number Diff line
@@ -108,7 +108,7 @@

&cpsw_emac0 {
	phy-handle = <&ethphy0>;
	phy-mode = "rgmii-txid";
	phy-mode = "rgmii-id";
};

&i2c0 {
+0 −16
Original line number Diff line number Diff line
@@ -225,7 +225,6 @@

		target-module@d000 {			/* 0x44e0d000, ap 20 38.0 */
			compatible = "ti,sysc-omap4", "ti,sysc";
			ti,hwmods = "adc_tsc";
			reg = <0xd000 0x4>,
			      <0xd010 0x4>;
			reg-names = "rev", "sysc";
@@ -1009,7 +1008,6 @@

		target-module@30000 {			/* 0x48030000, ap 77 08.0 */
			compatible = "ti,sysc-omap2", "ti,sysc";
			ti,hwmods = "spi0";
			reg = <0x30000 0x4>,
			      <0x30110 0x4>,
			      <0x30114 0x4>;
@@ -1134,7 +1132,6 @@

		target-module@42000 {			/* 0x48042000, ap 24 1c.0 */
			compatible = "ti,sysc-omap4-timer", "ti,sysc";
			ti,hwmods = "timer3";
			reg = <0x42000 0x4>,
			      <0x42010 0x4>,
			      <0x42014 0x4>;
@@ -1160,7 +1157,6 @@

		target-module@44000 {			/* 0x48044000, ap 26 26.0 */
			compatible = "ti,sysc-omap4-timer", "ti,sysc";
			ti,hwmods = "timer4";
			reg = <0x44000 0x4>,
			      <0x44010 0x4>,
			      <0x44014 0x4>;
@@ -1187,7 +1183,6 @@

		target-module@46000 {			/* 0x48046000, ap 28 28.0 */
			compatible = "ti,sysc-omap4-timer", "ti,sysc";
			ti,hwmods = "timer5";
			reg = <0x46000 0x4>,
			      <0x46010 0x4>,
			      <0x46014 0x4>;
@@ -1214,7 +1209,6 @@

		target-module@48000 {			/* 0x48048000, ap 30 22.0 */
			compatible = "ti,sysc-omap4-timer", "ti,sysc";
			ti,hwmods = "timer6";
			reg = <0x48000 0x4>,
			      <0x48010 0x4>,
			      <0x48014 0x4>;
@@ -1241,7 +1235,6 @@

		target-module@4a000 {			/* 0x4804a000, ap 85 60.0 */
			compatible = "ti,sysc-omap4-timer", "ti,sysc";
			ti,hwmods = "timer7";
			reg = <0x4a000 0x4>,
			      <0x4a010 0x4>,
			      <0x4a014 0x4>;
@@ -1344,7 +1337,6 @@

		target-module@80000 {			/* 0x48080000, ap 38 18.0 */
			compatible = "ti,sysc-omap2", "ti,sysc";
			ti,hwmods = "elm";
			reg = <0x80000 0x4>,
			      <0x80010 0x4>,
			      <0x80014 0x4>;
@@ -1412,7 +1404,6 @@

		target-module@ca000 {			/* 0x480ca000, ap 91 40.0 */
			compatible = "ti,sysc-omap2", "ti,sysc";
			ti,hwmods = "spinlock";
			reg = <0xca000 0x4>,
			      <0xca010 0x4>,
			      <0xca014 0x4>;
@@ -1533,7 +1524,6 @@

		target-module@a0000 {			/* 0x481a0000, ap 79 24.0 */
			compatible = "ti,sysc-omap2", "ti,sysc";
			ti,hwmods = "spi1";
			reg = <0xa0000 0x4>,
			      <0xa0110 0x4>,
			      <0xa0114 0x4>;
@@ -1749,7 +1739,6 @@
			compatible = "ti,sysc-omap4", "ti,sysc";
			reg = <0xcc020 0x4>;
			reg-names = "rev";
			ti,hwmods = "d_can0";
			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
			clocks = <&l4ls_clkctrl AM3_L4LS_D_CAN0_CLKCTRL 0>,
				 <&dcan0_fck>;
@@ -1773,7 +1762,6 @@
			compatible = "ti,sysc-omap4", "ti,sysc";
			reg = <0xd0020 0x4>;
			reg-names = "rev";
			ti,hwmods = "d_can1";
			/* Domains (P, C): per_pwrdm, l4ls_clkdm */
			clocks = <&l4ls_clkctrl AM3_L4LS_D_CAN1_CLKCTRL 0>,
				 <&dcan1_fck>;
@@ -1863,7 +1851,6 @@

		target-module@0 {			/* 0x48300000, ap 66 48.0 */
			compatible = "ti,sysc-omap4", "ti,sysc";
			ti,hwmods = "epwmss0";
			reg = <0x0 0x4>,
			      <0x4 0x4>;
			reg-names = "rev", "sysc";
@@ -1916,7 +1903,6 @@

		target-module@2000 {			/* 0x48302000, ap 68 52.0 */
			compatible = "ti,sysc-omap4", "ti,sysc";
			ti,hwmods = "epwmss1";
			reg = <0x2000 0x4>,
			      <0x2004 0x4>;
			reg-names = "rev", "sysc";
@@ -1969,7 +1955,6 @@

		target-module@4000 {			/* 0x48304000, ap 70 44.0 */
			compatible = "ti,sysc-omap4", "ti,sysc";
			ti,hwmods = "epwmss2";
			reg = <0x4000 0x4>,
			      <0x4004 0x4>;
			reg-names = "rev", "sysc";
@@ -2022,7 +2007,6 @@

		target-module@e000 {			/* 0x4830e000, ap 72 4a.0 */
			compatible = "ti,sysc-omap4", "ti,sysc";
			ti,hwmods = "lcdc";
			reg = <0xe000 0x4>,
			      <0xe054 0x4>;
			reg-names = "rev", "sysc";
+54 −15
Original line number Diff line number Diff line
@@ -439,19 +439,57 @@
			status = "disabled";
		};

		sham: sham@53100000 {
		sham_target: target-module@53100000 {
			compatible = "ti,sysc-omap3-sham", "ti,sysc";
			reg = <0x53100100 0x4>,
			      <0x53100110 0x4>,
			      <0x53100114 0x4>;
			reg-names = "rev", "sysc", "syss";
			ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
					 SYSC_OMAP2_AUTOIDLE)>;
			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>;
			ti,syss-mask = <1>;
			/* Domains (P, C): per_pwrdm, l3_clkdm */
			clocks = <&l3_clkctrl AM3_L3_SHAM_CLKCTRL 0>;
			clock-names = "fck";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x0 0x53100000 0x1000>;

			sham: sham@0 {
				compatible = "ti,omap4-sham";
			ti,hwmods = "sham";
			reg = <0x53100000 0x200>;
				reg = <0 0x200>;
				interrupts = <109>;
				dmas = <&edma 36 0>;
				dma-names = "rx";
			};
		};

		aes_target: target-module@53500000 {
			compatible = "ti,sysc-omap2", "ti,sysc";
			reg = <0x53500080 0x4>,
			      <0x53500084 0x4>,
			      <0x53500088 0x4>;
			reg-names = "rev", "sysc", "syss";
			ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
					 SYSC_OMAP2_AUTOIDLE)>;
			ti,sysc-sidle = <SYSC_IDLE_FORCE>,
					<SYSC_IDLE_NO>,
					<SYSC_IDLE_SMART>,
					<SYSC_IDLE_SMART_WKUP>;
			ti,syss-mask = <1>;
			/* Domains (P, C): per_pwrdm, l3_clkdm */
			clocks = <&l3_clkctrl AM3_L3_AES_CLKCTRL 0>;
			clock-names = "fck";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0x0 0x53500000 0x1000>;

		aes: aes@53500000 {
			aes: aes@0 {
				compatible = "ti,omap4-aes";
			ti,hwmods = "aes";
			reg = <0x53500000 0xa0>;
				reg = <0 0xa0>;
				interrupts = <103>;
				dmas = <&edma 6 0>,
				       <&edma 5 0>;
@@ -459,6 +497,7 @@
			};
		};
	};
};

#include "am33xx-l4.dtsi"
#include "am33xx-clocks.dtsi"
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