Commit 955ceb56 authored by Biju Das's avatar Biju Das Committed by Geert Uytterhoeven
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arm64: dts: renesas: r8a774b1: Add FCPF and FCPV instances



Add FCPF and FCPV instances to the r8a774b1 dtsi.

Based on the work done for r8a77965 SoC.

Signed-off-by: default avatarBiju Das <biju.das@bp.renesas.com>
Link: https://lore.kernel.org/r/1569313375-53428-5-git-send-email-biju.das@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 63093a8e
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+40 −0
Original line number Diff line number Diff line
@@ -1157,6 +1157,46 @@
			/* placeholder */
		};

		fcpf0: fcp@fe950000 {
			compatible = "renesas,fcpf";
			reg = <0 0xfe950000 0 0x200>;
			clocks = <&cpg CPG_MOD 615>;
			power-domains = <&sysc R8A774B1_PD_A3VP>;
			resets = <&cpg 615>;
		};

		fcpvb0: fcp@fe96f000 {
			compatible = "renesas,fcpv";
			reg = <0 0xfe96f000 0 0x200>;
			clocks = <&cpg CPG_MOD 607>;
			power-domains = <&sysc R8A774B1_PD_A3VP>;
			resets = <&cpg 607>;
		};

		fcpvd0: fcp@fea27000 {
			compatible = "renesas,fcpv";
			reg = <0 0xfea27000 0 0x200>;
			clocks = <&cpg CPG_MOD 603>;
			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
			resets = <&cpg 603>;
		};

		fcpvd1: fcp@fea2f000 {
			compatible = "renesas,fcpv";
			reg = <0 0xfea2f000 0 0x200>;
			clocks = <&cpg CPG_MOD 602>;
			power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
			resets = <&cpg 602>;
		};

		fcpvi0: fcp@fe9af000 {
			compatible = "renesas,fcpv";
			reg = <0 0xfe9af000 0 0x200>;
			clocks = <&cpg CPG_MOD 611>;
			power-domains = <&sysc R8A774B1_PD_A3VP>;
			resets = <&cpg 611>;
		};

		hdmi0: hdmi@fead0000 {
			reg = <0 0xfead0000 0 0x10000>;