Commit 9555152b authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'amd-drm-next-5.9-2020-07-01' of git://people.freedesktop.org/~agd5f/linux into drm-next 

amd-drm-next-5.9-2020-07-01:

amdgpu:
- DC DMUB updates
- HDCP fixes
- Thermal interrupt fixes
- Add initial support for Sienna Cichlid GPU
- Add support for unique id on Arcturus
- Major swSMU code cleanup
- Skip BAR resizing if the bios already did id
- Fixes for DCN bandwidth calculations
- Runtime PM reference count fixes
- Add initial UVD support for SI
- Add support for ASSR on eDP links
- Lots of misc fixes and cleanups
- Enable runtime PM on vega10 boards that support BACO
- RAS fixes
- SR-IOV fixes
- Use IP discovery table on renoir
- DC stream synchronization fixes

amdkfd:
- Track SDMA usage per process
- Fix GCC10 compiler warnings
- Locking fix

radeon:
- Default to on chip GART for AGP boards on all arches
- Runtime PM reference count fixes

UAPI:
- Update comments to clarify MTYPE

From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200701155041.1102829-1-alexander.deucher@amd.com


Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parents f75020fc 78083631

drivers/gpu/drm/amd/amdgpu/Makefile

+18 −12
Original line number Diff line number Diff line
@@ -63,12 +63,13 @@ amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o 
amdgpu-$(CONFIG_DRM_AMDGPU_CIK)+= cik.o cik_ih.o kv_smc.o kv_dpm.o \

	dce_v8_0.o gfx_v7_0.o cik_sdma.o uvd_v4_2.o vce_v2_0.o



amdgpu-$(CONFIG_DRM_AMDGPU_SI)+= si.o gmc_v6_0.o gfx_v6_0.o si_ih.o si_dma.o dce_v6_0.o si_dpm.o si_smc.o

amdgpu-$(CONFIG_DRM_AMDGPU_SI)+= si.o gmc_v6_0.o gfx_v6_0.o si_ih.o si_dma.o dce_v6_0.o si_dpm.o si_smc.o \

	uvd_v3_1.o



amdgpu-y += \

	vi.o mxgpu_vi.o nbio_v6_1.o soc15.o emu_soc.o mxgpu_ai.o nbio_v7_0.o vega10_reg_init.o \

	vega20_reg_init.o nbio_v7_4.o nbio_v2_3.o nv.o navi10_reg_init.o navi14_reg_init.o \

	arct_reg_init.o navi12_reg_init.o mxgpu_nv.o

	arct_reg_init.o navi12_reg_init.o mxgpu_nv.o sienna_cichlid_reg_init.o



# add DF block

amdgpu-y += \
@@ -80,7 +81,7 @@ amdgpu-y += \ 
	gmc_v7_0.o \

	gmc_v8_0.o \

	gfxhub_v1_0.o mmhub_v1_0.o gmc_v9_0.o gfxhub_v1_1.o mmhub_v9_4.o \

	gfxhub_v2_0.o mmhub_v2_0.o gmc_v10_0.o

	gfxhub_v2_0.o mmhub_v2_0.o gmc_v10_0.o gfxhub_v2_1.o



# add UMC block

amdgpu-y += \
@@ -129,7 +130,8 @@ amdgpu-y += \ 
	sdma_v2_4.o \

	sdma_v3_0.o \

	sdma_v4_0.o \

	sdma_v5_0.o

	sdma_v5_0.o \

	sdma_v5_2.o



# add MES block

amdgpu-y += \
@@ -154,15 +156,18 @@ amdgpu-y += \ 
	vcn_v1_0.o \

	vcn_v2_0.o \

	vcn_v2_5.o \

	vcn_v3_0.o \

	amdgpu_jpeg.o \

	jpeg_v1_0.o \

	jpeg_v2_0.o \

	jpeg_v2_5.o

	jpeg_v2_5.o \

	jpeg_v3_0.o



# add ATHUB block

amdgpu-y += \

	athub_v1_0.o \

	athub_v2_0.o

	athub_v2_0.o \

	athub_v2_1.o



# add amdkfd interfaces

amdgpu-y += amdgpu_amdkfd.o
@@ -177,7 +182,8 @@ amdgpu-y += \ 
	amdgpu_amdkfd_gfx_v8.o \

	amdgpu_amdkfd_gfx_v9.o \

	amdgpu_amdkfd_arcturus.o \

	 amdgpu_amdkfd_gfx_v10.o

	amdgpu_amdkfd_gfx_v10.o \

	amdgpu_amdkfd_gfx_v10_3.o



ifneq ($(CONFIG_DRM_AMDGPU_CIK),)

amdgpu-y += amdgpu_amdkfd_gfx_v7.o

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+6 −5
Original line number Diff line number Diff line
@@ -186,8 +186,10 @@ extern int amdgpu_noretry; 
extern int amdgpu_force_asic_type;

#ifdef CONFIG_HSA_AMD

extern int sched_policy;

extern bool debug_evictions;

#else

static const int sched_policy = KFD_SCHED_POLICY_HWS;

static const bool debug_evictions; /* = false */

#endif



extern int amdgpu_tmz;
@@ -652,10 +654,6 @@ struct amdgpu_fw_vram_usage { 
	u64 size;

	struct amdgpu_bo *reserved_bo;

	void *va;



	/* GDDR6 training support flag.

	*/

	bool mem_train_support;

};



/*
@@ -990,9 +988,12 @@ struct amdgpu_device { 
	/* Chip product information */

	char				product_number[16];

	char				product_name[32];

	char				serial[16];

	char				serial[20];



	struct amdgpu_autodump		autodump;



	atomic_t			throttling_logging_enabled;

	struct ratelimit_state		throttling_logging_rs;

};



static inline struct amdgpu_device *amdgpu_ttm_adev(struct ttm_bo_device *bdev)

drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c

+30 −43
Original line number Diff line number Diff line
@@ -64,7 +64,9 @@ struct amdgpu_atif { 
	struct amdgpu_atif_notifications notifications;

	struct amdgpu_atif_functions functions;

	struct amdgpu_atif_notification_cfg notification_cfg;

	struct amdgpu_encoder *encoder_for_bl;

#if defined(CONFIG_BACKLIGHT_CLASS_DEVICE) || defined(CONFIG_BACKLIGHT_CLASS_DEVICE_MODULE)

	struct backlight_device *bd;

#endif

	struct amdgpu_dm_backlight_caps backlight_caps;

};
@@ -444,45 +446,21 @@ static int amdgpu_atif_handler(struct amdgpu_device *adev, 


		DRM_DEBUG_DRIVER("ATIF: %d pending SBIOS requests\n", count);



		if ((req.pending & ATIF_PANEL_BRIGHTNESS_CHANGE_REQUEST) &&

		    !amdgpu_device_has_dc_support(adev)) {

			struct amdgpu_encoder *enc = atif->encoder_for_bl;



			if (enc) {

				struct amdgpu_encoder_atom_dig *dig = enc->enc_priv;



				DRM_DEBUG_DRIVER("Changing brightness to %d\n",

						 req.backlight_level);



				amdgpu_display_backlight_set_level(adev, enc, req.backlight_level);



#if defined(CONFIG_BACKLIGHT_CLASS_DEVICE) || defined(CONFIG_BACKLIGHT_CLASS_DEVICE_MODULE)

				backlight_force_update(dig->bl_dev,

						       BACKLIGHT_UPDATE_HOTKEY);

#endif

			}

		}

#if defined(CONFIG_DRM_AMD_DC)

		if (req.pending & ATIF_PANEL_BRIGHTNESS_CHANGE_REQUEST) {

#if defined(CONFIG_BACKLIGHT_CLASS_DEVICE) || defined(CONFIG_BACKLIGHT_CLASS_DEVICE_MODULE)

		if ((req.pending & ATIF_PANEL_BRIGHTNESS_CHANGE_REQUEST) &&

		    amdgpu_device_has_dc_support(adev)) {

			struct amdgpu_display_manager *dm = &adev->dm;

			struct backlight_device *bd = dm->backlight_dev;



			if (bd) {

			if (atif->bd) {

				DRM_DEBUG_DRIVER("Changing brightness to %d\n",

						 req.backlight_level);



				/*

				 * XXX backlight_device_set_brightness() is

				 * hardwired to post BACKLIGHT_UPDATE_SYSFS.

				 * It probably should accept 'reason' parameter.

				 */

				backlight_device_set_brightness(bd, req.backlight_level);

			}

				backlight_device_set_brightness(atif->bd, req.backlight_level);

			}

#endif

#endif

		}



		if (req.pending & ATIF_DGPU_DISPLAY_EVENT) {

			if (adev->flags & AMD_IS_PX) {

				pm_runtime_get_sync(adev->ddev->dev);
@@ -829,6 +807,13 @@ int amdgpu_acpi_init(struct amdgpu_device *adev) 
	adev->atif = atif;



	if (atif->notifications.brightness_change) {

#if defined(CONFIG_BACKLIGHT_CLASS_DEVICE) || defined(CONFIG_BACKLIGHT_CLASS_DEVICE_MODULE)

		if (amdgpu_device_has_dc_support(adev)) {

#if defined(CONFIG_DRM_AMD_DC)

			struct amdgpu_display_manager *dm = &adev->dm;

			atif->bd = dm->backlight_dev;

#endif

		} else {

			struct drm_encoder *tmp;



			/* Find the encoder controlling the brightness */
@@ -840,12 +825,14 @@ int amdgpu_acpi_init(struct amdgpu_device *adev) 
				    enc->enc_priv) {

					struct amdgpu_encoder_atom_dig *dig = enc->enc_priv;

					if (dig->bl_dev) {

					atif->encoder_for_bl = enc;

						atif->bd = dig->bl_dev;

						break;

					}

				}

			}

		}

	}

#endif



	if (atif->functions.sbios_requests && !atif->functions.system_params) {

		/* XXX check this workraround, if sbios request function is

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

0 → 100644
+834 −0

File added.

Preview size limit exceeded, changes collapsed.

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c

+4 −4
Original line number Diff line number Diff line
@@ -395,7 +395,7 @@ static int vm_update_pds(struct amdgpu_vm *vm, struct amdgpu_sync *sync) 
	if (ret)

		return ret;



	return amdgpu_sync_fence(sync, vm->last_update, false);

	return amdgpu_sync_fence(sync, vm->last_update);

}



static uint64_t get_pte_flags(struct amdgpu_device *adev, struct kgd_mem *mem)
@@ -785,7 +785,7 @@ static int unmap_bo_from_gpuvm(struct amdgpu_device *adev, 


	amdgpu_vm_clear_freed(adev, vm, &bo_va->last_pt_update);



	amdgpu_sync_fence(sync, bo_va->last_pt_update, false);

	amdgpu_sync_fence(sync, bo_va->last_pt_update);



	return 0;

}
@@ -804,7 +804,7 @@ static int update_gpuvm_pte(struct amdgpu_device *adev, 
		return ret;

	}



	return amdgpu_sync_fence(sync, bo_va->last_pt_update, false);

	return amdgpu_sync_fence(sync, bo_va->last_pt_update);

}



static int map_bo_to_gpuvm(struct amdgpu_device *adev,
@@ -2102,7 +2102,7 @@ int amdgpu_amdkfd_gpuvm_restore_process_bos(void *info, struct dma_fence **ef) 
			pr_debug("Memory eviction: Validate BOs failed. Try again\n");

			goto validate_map_fail;

		}

		ret = amdgpu_sync_fence(&sync_obj, bo->tbo.moving, false);

		ret = amdgpu_sync_fence(&sync_obj, bo->tbo.moving);

		if (ret) {

			pr_debug("Memory eviction: Sync BO fence failed. Try again\n");

			goto validate_map_fail;

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