Commit 9520b532 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm 

Pull ARM fixes from Russell King:
 "A small number of ARM fixes

   - Fix function tracer and unwinder dependencies so that we don't end
     up building kernels that will crash

   - Fix ARMv7M nommu initialisation (missing register initialisation)

   - Fix EFI decompressor entry (ensuring barrier instructions are
     enabled prior to use)"

* tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm:
  ARM: 8857/1: efi: enable CP15 DMB instructions before cleaning the cache
  ARM: 8856/1: NOMMU: Fix CCR register faulty initialization when MPU is disabled
  ARM: fix function graph tracer and unwinder dependencies
parents 0d82044e e17b1af9

arch/arm/Kconfig

+1 −1
Original line number Diff line number Diff line
@@ -73,7 +73,7 @@ config ARM 
	select HAVE_EFFICIENT_UNALIGNED_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && MMU

	select HAVE_EXIT_THREAD

	select HAVE_FTRACE_MCOUNT_RECORD if !XIP_KERNEL

	select HAVE_FUNCTION_GRAPH_TRACER if !THUMB2_KERNEL

	select HAVE_FUNCTION_GRAPH_TRACER if !THUMB2_KERNEL && !CC_IS_CLANG

	select HAVE_FUNCTION_TRACER if !XIP_KERNEL

	select HAVE_GCC_PLUGINS

	select HAVE_HW_BREAKPOINT if PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7)

arch/arm/Kconfig.debug

+3 −3
Original line number Diff line number Diff line
@@ -47,8 +47,8 @@ config DEBUG_WX 


choice

	prompt "Choose kernel unwinder"

	default UNWINDER_ARM if AEABI && !FUNCTION_GRAPH_TRACER

	default UNWINDER_FRAME_POINTER if !AEABI || FUNCTION_GRAPH_TRACER

	default UNWINDER_ARM if AEABI

	default UNWINDER_FRAME_POINTER if !AEABI

	help

	  This determines which method will be used for unwinding kernel stack

	  traces for panics, oopses, bugs, warnings, perf, /proc/<pid>/stack,
@@ -65,7 +65,7 @@ config UNWINDER_FRAME_POINTER 


config UNWINDER_ARM

	bool "ARM EABI stack unwinder"

	depends on AEABI

	depends on AEABI && !FUNCTION_GRAPH_TRACER

	select ARM_UNWIND

	help

	  This option enables stack unwinding support in the kernel

arch/arm/boot/compressed/head.S

+15 −1
Original line number Diff line number Diff line
@@ -1438,7 +1438,21 @@ ENTRY(efi_stub_entry) 


		@ Preserve return value of efi_entry() in r4

		mov	r4, r0

		bl	cache_clean_flush



		@ our cache maintenance code relies on CP15 barrier instructions

		@ but since we arrived here with the MMU and caches configured

		@ by UEFI, we must check that the CP15BEN bit is set in SCTLR.

		@ Note that this bit is RAO/WI on v6 and earlier, so the ISB in

		@ the enable path will be executed on v7+ only.

		mrc	p15, 0, r1, c1, c0, 0	@ read SCTLR

		tst	r1, #(1 << 5)		@ CP15BEN bit set?

		bne	0f

		orr	r1, r1, #(1 << 5)	@ CP15 barrier instructions

		mcr	p15, 0, r1, c1, c0, 0	@ write SCTLR

 ARM(		.inst	0xf57ff06f		@ v7+ isb	)

 THUMB(		isb						)



0:		bl	cache_clean_flush

		bl	cache_off



		@ Set parameters for booting zImage according to boot protocol

arch/arm/kernel/head-nommu.S

+1 −1
Original line number Diff line number Diff line
@@ -133,9 +133,9 @@ __secondary_data: 
 */

	.text

__after_proc_init:

#ifdef CONFIG_ARM_MPU

M_CLASS(movw	r12, #:lower16:BASEADDR_V7M_SCB)

M_CLASS(movt	r12, #:upper16:BASEADDR_V7M_SCB)

#ifdef CONFIG_ARM_MPU

M_CLASS(ldr	r3, [r12, 0x50])

AR_CLASS(mrc	p15, 0, r3, c0, c1, 4)          @ Read ID_MMFR0

	and	r3, r3, #(MMFR0_PMSA)           @ PMSA field

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