Commit 94f6bac1 authored Sep 30, 2008 by Krzysztof Helt Committed by Ingo Molnar Oct 13, 2008

x86: do not allow to optimize flag_is_changeable_p() (rev. 2)



The flag_is_changeable_p() is used by
has_cpuid_p() which can return different results
in the code sequence below:

 if (!have_cpuid_p())
      identify_cpu_without_cpuid(c);

  /* cyrix could have cpuid enabled via c_identify()*/
  if (!have_cpuid_p())
      return;

Otherwise, the gcc 3.4.6 optimizes these two calls
into one which make the code not working correctly.

Cyrix cpus have the CPUID instruction enabled before
the second call to the have_cpuid_p() but
it is not detected due to the gcc optimization.
Thus the ARR registers (mtrr like) are not detected
on such a cpu.

Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl>
Signed-off-by: Ingo Molnar <mingo@elte.hu>

parent e2ce07c8

arch/x86/kernel/cpu/common.c

+19 −12

Original line number	Diff line number	Diff line
		@@ -124,7 +124,14 @@ static inline int flag_is_changeable_p(u32 flag)
		{
		u32 f1, f2;

		asm("pushfl\n\t"
		/*
		* Cyrix and IDT cpus allow disabling of CPUID
		* so the code below may return different results
		* when it is executed before and after enabling
		* the CPUID. Add "volatile" to not allow gcc to
		* optimize the subsequent calls to this function.
		*/
		asm volatile ("pushfl\n\t"
		"pushfl\n\t"
		"popl %0\n\t"
		"movl %0,%1\n\t"

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