Commit 94db5b98 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'socfpga_updates_for_v4.2' of... 

Merge tag 'socfpga_updates_for_v4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/soc

Merge "SoCFPGA updates for v4.2" from Dinh Nguyen:

- Add big endian support
- Add earlyprintk support on UART1 that is used on Arria10
- Remove the need to map uart_io_desc
- Use of_iomap to map the SCU
- Remove socfpga_smp_init_cpus as arm_dt_init_cpu_maps is already doing
  the CPU mapping.

* tag 'socfpga_updates_for_v4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  ARM: socfpga: use of_iomap to map the SCU
  ARM: socfpga: remove the need to map uart_io_desc
  ARM: socfpga: Add support for UART1 debug uart for earlyprintk
  ARM: socfpga: support big endian for socfpga
  ARM: socfpga: enable big endian for secondary core(s)
  ARM: debug: fix big endian operation for 8250 word mode
parents 73e601ea 122694a0

arch/arm/Kconfig.debug

+19 −7
Original line number Diff line number Diff line
@@ -908,13 +908,22 @@ choice 
		  on SA-11x0 UART ports. The kernel will check for the first

		  enabled UART in a sequence 3-1-2.



	config DEBUG_SOCFPGA_UART

	config DEBUG_SOCFPGA_UART0

		depends on ARCH_SOCFPGA

		bool "Use SOCFPGA UART for low-level debug"

		bool "Use SOCFPGA UART0 for low-level debug"

		select DEBUG_UART_8250

		help

		  Say Y here if you want kernel low-level debugging support

		  on SOCFPGA based platforms.

		  on SOCFPGA(Cyclone 5 and Arria 5) based platforms.



	config DEBUG_SOCFPGA_UART1

		depends on ARCH_SOCFPGA

		bool "Use SOCFPGA UART1 for low-level debug"

		select DEBUG_UART_8250

		help

		  Say Y here if you want kernel low-level debugging support

		  on SOCFPGA(Arria 10) based platforms.





	config DEBUG_SUN9I_UART0

		bool "Kernel low-level debugging messages via sun9i UART0"
@@ -1407,7 +1416,8 @@ config DEBUG_UART_PHYS 
	default 0xfd883000 if DEBUG_ALPINE_UART0

	default 0xfe800000 if ARCH_IOP32X

	default 0xff690000 if DEBUG_RK32_UART2

	default 0xffc02000 if DEBUG_SOCFPGA_UART

	default 0xffc02000 if DEBUG_SOCFPGA_UART0

	default 0xffc02100 if DEBUG_SOCFPGA_UART1

	default 0xffd82340 if ARCH_IOP13XX

	default 0xffe40000 if DEBUG_RCAR_GEN1_SCIF0

	default 0xffe42000 if DEBUG_RCAR_GEN1_SCIF2
@@ -1485,7 +1495,8 @@ config DEBUG_UART_VIRT 
	default 0xfeb26000 if DEBUG_RK3X_UART1

	default 0xfeb30c00 if DEBUG_KEYSTONE_UART0

	default 0xfeb31000 if DEBUG_KEYSTONE_UART1

	default 0xfec02000 if DEBUG_SOCFPGA_UART

	default 0xfec02000 if DEBUG_SOCFPGA_UART0

	default 0xfec02100 if DEBUG_SOCFPGA_UART1

	default 0xfec12000 if DEBUG_MVEBU_UART0 || DEBUG_MVEBU_UART0_ALTERNATE

	default 0xfec12100 if DEBUG_MVEBU_UART1_ALTERNATE

	default 0xfec10000 if DEBUG_SIRFATLAS7_UART0
@@ -1530,8 +1541,9 @@ config DEBUG_UART_8250_WORD 
	bool "Use 32-bit accesses for 8250 UART"

	depends on DEBUG_LL_UART_8250 || DEBUG_UART_8250

	depends on DEBUG_UART_8250_SHIFT >= 2

	default y if DEBUG_PICOXCELL_UART || DEBUG_SOCFPGA_UART || \

		ARCH_KEYSTONE || DEBUG_ALPINE_UART0 || \

	default y if DEBUG_PICOXCELL_UART || DEBUG_SOCFPGA_UART0 || \

		DEBUG_SOCFPGA_UART1 || ARCH_KEYSTONE || \

		DEBUG_ALPINE_UART0 || \

		DEBUG_DAVINCI_DMx_UART0 || DEBUG_DAVINCI_DA8XX_UART1 || \

		DEBUG_DAVINCI_DA8XX_UART2 || \

		DEBUG_BCM_KONA_UART || DEBUG_RK32_UART2 || \

arch/arm/include/debug/8250.S

+3 −0
Original line number Diff line number Diff line
@@ -16,11 +16,14 @@ 


#ifdef CONFIG_DEBUG_UART_8250_WORD

		.macro	store, rd, rx:vararg

	 ARM_BE8(rev \rd, \rd)

		str	\rd, \rx

	 ARM_BE8(rev \rd, \rd)

		.endm



		.macro	load, rd, rx:vararg

		ldr	\rd, \rx

	ARM_BE8(rev \rd, \rd)

		.endm

#else

		.macro	store, rd, rx:vararg

arch/arm/mach-socfpga/Kconfig

+1 −0
Original line number Diff line number Diff line 
config ARCH_SOCFPGA

	bool "Altera SOCFPGA family" if ARCH_MULTI_V7

	select ARCH_SUPPORTS_BIG_ENDIAN

	select ARM_AMBA

	select ARM_GIC

	select CACHE_L2X0

arch/arm/mach-socfpga/core.h

+0 −1
Original line number Diff line number Diff line
@@ -32,7 +32,6 @@ 
#define RSTMGR_MPUMODRST_CPU1		0x2     /* CPU1 Reset */



extern void socfpga_secondary_startup(void);

extern void __iomem *socfpga_scu_base_addr;



extern void socfpga_init_clocks(void);

extern void socfpga_sysmgr_init(void);

arch/arm/mach-socfpga/headsmp.S

+4 −1
Original line number Diff line number Diff line
@@ -10,6 +10,7 @@ 
#include <linux/linkage.h>

#include <linux/init.h>

#include <asm/memory.h>

#include <asm/assembler.h>



	.arch	armv7-a
@@ -19,11 +20,13 @@ ENTRY(secondary_trampoline) 
	 * address of &cpu1start_addr. This would not work for platforms

	 * where the physical memory does not start at 0x0.

	*/

ARM_BE8(setend	be)

	adr	r0, 1f

	ldmia	r0, {r1, r2}

	sub	r2, r2, #PAGE_OFFSET

	ldr	r3, [r2]

	ldr	r4, [r3]

ARM_BE8(rev	r4, r4)

	bx	r4



	.align

CRA Git | Maintained and supported by SUSTech CRA and CCSE