Merge branch 'ixp4xx' of git://git.kernel.org/pub/scm/linux/kernel/git/chris/linux-2.6 (946880fa) · Commits · 戴 / test

arch/arm/mach-ixp4xx/Kconfig

+8 −0

Original line number	Diff line number	Diff line
		@@ -140,6 +140,14 @@ config MACH_FSG
		FSG-3 device. For more information on this platform,
		see http://www.nslu2-linux.org/wiki/FSG3/HomePage

		config MACH_ARCOM_VULCAN
		bool
		prompt "Arcom/Eurotech Vulcan"
		select PCI
		help
		Say 'Y' here if you want your kernel to support Arcom's
		Vulcan board.

		#
		# Certain registers and IRQs are only enabled if supporting IXP465 CPUs
		#

arch/arm/mach-ixp4xx/Makefile

+2 −0

Original line number	Diff line number	Diff line
		@@ -16,6 +16,7 @@ obj-pci-$(CONFIG_MACH_DSMG600) += dsmg600-pci.o
		obj-pci-$(CONFIG_MACH_GATEWAY7001) += gateway7001-pci.o
		obj-pci-$(CONFIG_MACH_WG302V2) += wg302v2-pci.o
		obj-pci-$(CONFIG_MACH_FSG) += fsg-pci.o
		obj-pci-$(CONFIG_MACH_ARCOM_VULCAN) += vulcan-pci.o

		obj-y += common.o

		@@ -31,6 +32,7 @@ obj-$(CONFIG_MACH_GATEWAY7001) += gateway7001-setup.o
		obj-$(CONFIG_MACH_WG302V2) += wg302v2-setup.o
		obj-$(CONFIG_MACH_FSG) += fsg-setup.o
		obj-$(CONFIG_MACH_GORAMO_MLR) += goramo_mlr.o
		obj-$(CONFIG_MACH_ARCOM_VULCAN) += vulcan-setup.o

		obj-$(CONFIG_PCI) += $(obj-pci-$(CONFIG_PCI)) common-pci.o
		obj-$(CONFIG_IXP4XX_QMGR) += ixp4xx_qmgr.o

arch/arm/mach-ixp4xx/include/mach/debug-macro.S

+2 −0

Original line number	Diff line number	Diff line
		@@ -16,8 +16,10 @@
		moveq \rx, #0xc8000000
		movne \rx, #0xff000000
		orrne \rx, \rx, #0x00b00000
		#ifdef __ARMEB__
		add \rx,\rx,#3 @ Uart regs are at off set of 3 if
		@ byte writes used - Big Endian.
		#endif
		.endm

		#define UART_SHIFT 2

arch/arm/mach-ixp4xx/include/mach/io.h

+3 −3

Original line number	Diff line number	Diff line
		@@ -353,7 +353,7 @@ static inline unsigned int ioread8(const void __iomem *addr)
		return (unsigned int)inb(port & PIO_MASK);
		else
		#ifndef CONFIG_IXP4XX_INDIRECT_PCI
		return (unsigned int)__raw_readb(port);
		return (unsigned int)__raw_readb(addr);
		#else
		return (unsigned int)__indirect_readb(addr);
		#endif
		@@ -381,7 +381,7 @@ static inline unsigned int ioread16(const void __iomem *addr)
		return (unsigned int)inw(port & PIO_MASK);
		else
		#ifndef CONFIG_IXP4XX_INDIRECT_PCI
		return le16_to_cpu(__raw_readw((u32)port));
		return le16_to_cpu((__force __le16)__raw_readw(addr));
		#else
		return (unsigned int)__indirect_readw(addr);
		#endif
		@@ -440,7 +440,7 @@ static inline void iowrite8(u8 value, void __iomem *addr)
		outb(value, port & PIO_MASK);
		else
		#ifndef CONFIG_IXP4XX_INDIRECT_PCI
		__raw_writeb(value, port);
		__raw_writeb(value, addr);
		#else
		__indirect_writeb(value, addr);
		#endif

arch/arm/mach-ixp4xx/vulcan-pci.c

0 → 100644

+73 −0

Original line number	Diff line number	Diff line
		/*
		* arch/arch/mach-ixp4xx/vulcan-pci.c
		*
		* Vulcan board-level PCI initialization
		*
		* Copyright (C) 2010 Marc Zyngier <maz@misterjones.org>
		*
		* based on ixdp425-pci.c:
		* Copyright (C) 2002 Intel Corporation.
		* Copyright (C) 2003-2004 MontaVista Software, Inc.
		*
		* This program is free software; you can redistribute it and/or modify
		* it under the terms of the GNU General Public License version 2 as
		* published by the Free Software Foundation.
		*
		*/

		#include <linux/pci.h>
		#include <linux/init.h>
		#include <linux/irq.h>
		#include <asm/mach/pci.h>
		#include <asm/mach-types.h>

		/* PCI controller GPIO to IRQ pin mappings */
		#define INTA 2
		#define INTB 3

		void __init vulcan_pci_preinit(void)
		{
		#ifndef CONFIG_IXP4XX_INDIRECT_PCI
		/*
		* Cardbus bridge wants way more than the SoC can actually offer,
		* and leaves the whole PCI bus in a mess. Artificially limit it
		* to 8MB per region. Of course indirect mode doesn't have this
		* limitation...
		*/
		pci_cardbus_mem_size = SZ_8M;
		pr_info("Vulcan PCI: limiting CardBus memory size to %dMB\n",
		(int)(pci_cardbus_mem_size >> 20));
		#endif
		set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
		set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
		ixp4xx_pci_preinit();
		}

		static int __init vulcan_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
		{
		if (slot == 1)
		return IXP4XX_GPIO_IRQ(INTA);

		if (slot == 2)
		return IXP4XX_GPIO_IRQ(INTB);

		return -1;
		}

		struct hw_pci vulcan_pci __initdata = {
		.nr_controllers = 1,
		.preinit = vulcan_pci_preinit,
		.swizzle = pci_std_swizzle,
		.setup = ixp4xx_setup,
		.scan = ixp4xx_scan_bus,
		.map_irq = vulcan_map_irq,
		};

		int __init vulcan_pci_init(void)
		{
		if (machine_is_arcom_vulcan())
		pci_common_init(&vulcan_pci);
		return 0;
		}

		subsys_initcall(vulcan_pci_init);

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