spi: dw-dma: Move DMAC register cleanup to DMA transfer method (945b5b60) · Commits · 戴 / test

DW APB SSI DMA driver doesn't use the native SPI core wait API since commit ("spi: dw: Locally wait for the DMA transfers completion"). Due to that the driver can now clear the DMAC register in a single place synchronously with the DMA transactions completion or failure. After that all the possible code paths are still covered: 1) DMA completion callbacks are executed in case if the corresponding DMA transactions are finished. When they are, one of them will eventually wake the SPI messages pump kernel thread and dw_spi_dma_transfer_all() method will clean the DMAC register as implied by this patch. 2) dma_stop is called when the SPI core detects an error either returned from the transfer_one() callback or set in the SPI message status field. Both types of errors will be noticed by the dw_spi_dma_transfer_all() method. 3) dma_exit is called when either SPI controller driver or the corresponding device is removed. In any case the SPI core will first flush the SPI messages pump kernel thread, so any pending or in-fly SPI transfers will be finished before that. Due to all of that let's simplify the DW APB SSI DMA driver a bit and move the DMAC register cleanup to a single place in the dw_spi_dma_transfer_all() method. Signed-off-by:

Serge Semin <Sergey.Semin@baikalelectronics.ru> Link: https://lore.kernel.org/r/20200920112322.24585-10-Sergey.Semin@baikalelectronics.ru Signed-off-by:

Mark Brown <broonie@kernel.org>

drivers/spi/spi-dw-dma.c

+8 −9

Original line number	Diff line number	Diff line
		@@ -152,8 +152,6 @@ static void dw_spi_dma_exit(struct dw_spi *dws)
		dmaengine_terminate_sync(dws->rxchan);
		dma_release_channel(dws->rxchan);
		}

		dw_writel(dws, DW_SPI_DMACR, 0);
		}

		static irqreturn_t dw_spi_dma_transfer_handler(struct dw_spi *dws)
		@@ -252,7 +250,6 @@ static void dw_spi_dma_tx_done(void *arg)
		if (test_bit(RX_BUSY, &dws->dma_chan_busy))
		return;

		dw_writel(dws, DW_SPI_DMACR, 0);
		complete(&dws->dma_completion);
		}

		@@ -355,7 +352,6 @@ static void dw_spi_dma_rx_done(void *arg)
		if (test_bit(TX_BUSY, &dws->dma_chan_busy))
		return;

		dw_writel(dws, DW_SPI_DMACR, 0);
		complete(&dws->dma_completion);
		}

		@@ -449,13 +445,13 @@ static int dw_spi_dma_transfer_all(struct dw_spi *dws,
		/* Submit the DMA Tx transfer */
		ret = dw_spi_dma_submit_tx(dws, xfer);
		if (ret)
		return ret;
		goto err_clear_dmac;

		/* Submit the DMA Rx transfer if required */
		if (xfer->rx_buf) {
		ret = dw_spi_dma_submit_rx(dws, xfer);
		if (ret)
		return ret;
		goto err_clear_dmac;

		/* rx must be started before tx due to spi instinct */
		dma_async_issue_pending(dws->rxchan);
		@@ -463,7 +459,12 @@ static int dw_spi_dma_transfer_all(struct dw_spi *dws,

		dma_async_issue_pending(dws->txchan);

		return dw_spi_dma_wait(dws, xfer);
		ret = dw_spi_dma_wait(dws, xfer);

		err_clear_dmac:
		dw_writel(dws, DW_SPI_DMACR, 0);

		return ret;
		}

		static int dw_spi_dma_transfer(struct dw_spi dws, struct spi_transfer xfer)
		@@ -496,8 +497,6 @@ static void dw_spi_dma_stop(struct dw_spi *dws)
		dmaengine_terminate_sync(dws->rxchan);
		clear_bit(RX_BUSY, &dws->dma_chan_busy);
		}

		dw_writel(dws, DW_SPI_DMACR, 0);
		}

		static const struct dw_spi_dma_ops dw_spi_dma_mfld_ops = {

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