Commit 94494598 authored by Yuval Mintz's avatar Yuval Mintz Committed by David S. Miller
Browse files

qed: Introduce DMA_REGPAIR_LE



FW hsi contains regpairs, mostly for 64-bit address representations.
Since same paradigm is applied each time a regpair is filled, this
introduces a new utility macro for setting such regpairs.

Signed-off-by: default avatarYuval Mintz <Yuval.Mintz@qlogic.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 06f56b81
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+3 −6
Original line number Diff line number Diff line
@@ -557,12 +557,10 @@ qed_sp_eth_rxq_start_ramrod(struct qed_hwfn *p_hwfn,
	p_ramrod->complete_event_flg	= 1;

	p_ramrod->bd_max_bytes	= cpu_to_le16(bd_max_bytes);
	p_ramrod->bd_base.hi	= DMA_HI_LE(bd_chain_phys_addr);
	p_ramrod->bd_base.lo	= DMA_LO_LE(bd_chain_phys_addr);
	DMA_REGPAIR_LE(p_ramrod->bd_base, bd_chain_phys_addr);

	p_ramrod->num_of_pbl_pages	= cpu_to_le16(cqe_pbl_size);
	p_ramrod->cqe_pbl_addr.hi	= DMA_HI_LE(cqe_pbl_addr);
	p_ramrod->cqe_pbl_addr.lo	= DMA_LO_LE(cqe_pbl_addr);
	DMA_REGPAIR_LE(p_ramrod->cqe_pbl_addr, cqe_pbl_addr);

	rc = qed_spq_post(p_hwfn, p_ent, NULL);

@@ -721,8 +719,7 @@ qed_sp_eth_txq_start_ramrod(struct qed_hwfn *p_hwfn,
	p_ramrod->stats_counter_id	= stats_id;

	p_ramrod->pbl_size		= cpu_to_le16(pbl_size);
	p_ramrod->pbl_base_addr.hi	= DMA_HI_LE(pbl_addr);
	p_ramrod->pbl_base_addr.lo	= DMA_LO_LE(pbl_addr);
	DMA_REGPAIR_LE(p_ramrod->pbl_base_addr, pbl_addr);

	pq_id			= qed_get_qm_pq(p_hwfn,
						PROTOCOLID_ETH,
+4 −8
Original line number Diff line number Diff line
@@ -136,16 +136,12 @@ int qed_sp_pf_start(struct qed_hwfn *p_hwfn,
	p_ramrod->outer_tag = p_hwfn->hw_info.ovlan;

	/* Place EQ address in RAMROD */
	p_ramrod->event_ring_pbl_addr.hi =
			DMA_HI_LE(p_hwfn->p_eq->chain.pbl.p_phys_table);
	p_ramrod->event_ring_pbl_addr.lo =
			DMA_LO_LE(p_hwfn->p_eq->chain.pbl.p_phys_table);
	DMA_REGPAIR_LE(p_ramrod->event_ring_pbl_addr,
		       p_hwfn->p_eq->chain.pbl.p_phys_table);
	p_ramrod->event_ring_num_pages = (u8)p_hwfn->p_eq->chain.page_cnt;

	p_ramrod->consolid_q_pbl_addr.hi =
			DMA_HI_LE(p_hwfn->p_consq->chain.pbl.p_phys_table);
	p_ramrod->consolid_q_pbl_addr.lo =
			DMA_LO_LE(p_hwfn->p_consq->chain.pbl.p_phys_table);
	DMA_REGPAIR_LE(p_ramrod->consolid_q_pbl_addr,
		       p_hwfn->p_consq->chain.pbl.p_phys_table);

	p_hwfn->hw_info.personality = PERSONALITY_ETH;

+3 −6
Original line number Diff line number Diff line
@@ -183,10 +183,8 @@ static void qed_spq_hw_initialize(struct qed_hwfn *p_hwfn,
	p_cxt->xstorm_st_context.spq_base_hi =
		DMA_HI_LE(p_spq->chain.p_phys_addr);

	p_cxt->xstorm_st_context.consolid_base_addr.lo =
		DMA_LO_LE(p_hwfn->p_consq->chain.p_phys_addr);
	p_cxt->xstorm_st_context.consolid_base_addr.hi =
		DMA_HI_LE(p_hwfn->p_consq->chain.p_phys_addr);
	DMA_REGPAIR_LE(p_cxt->xstorm_st_context.consolid_base_addr,
		       p_hwfn->p_consq->chain.p_phys_addr);
}

static int qed_spq_hw_post(struct qed_hwfn *p_hwfn,
@@ -423,8 +421,7 @@ void qed_spq_setup(struct qed_hwfn *p_hwfn)
	p_virt	= p_spq->p_virt;

	for (i = 0; i < p_spq->chain.capacity; i++) {
		p_virt->elem.data_ptr.hi = DMA_HI_LE(p_phys);
		p_virt->elem.data_ptr.lo = DMA_LO_LE(p_phys);
		DMA_REGPAIR_LE(p_virt->elem.data_ptr, p_phys);

		list_add_tail(&p_virt->list, &p_spq->free_pool);

+4 −0
Original line number Diff line number Diff line
@@ -19,6 +19,10 @@
/* dma_addr_t manip */
#define DMA_LO_LE(x)            cpu_to_le32(lower_32_bits(x))
#define DMA_HI_LE(x)            cpu_to_le32(upper_32_bits(x))
#define DMA_REGPAIR_LE(x, val)  do { \
					(x).hi = DMA_HI_LE((val)); \
					(x).lo = DMA_LO_LE((val)); \
				} while (0)

#define HILO_GEN(hi, lo, type)  ((((type)(hi)) << 32) + (lo))
#define HILO_DMA(hi, lo)        HILO_GEN(hi, lo, dma_addr_t)