Commit 942164ca authored by Ulrich Hecht's avatar Ulrich Hecht Committed by Simon Horman
Browse files

arm64: dts: renesas: r8a77995: add SYS-DMAC nodes 



Differs from other Gen3 SoCs in that each controller only supports eight
channels.

Signed-off-by: default avatarUlrich Hecht <ulrich.hecht+renesas@gmail.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 499468cf

arch/arm64/boot/dts/renesas/r8a77995.dtsi

+72 −0
Original line number Diff line number Diff line
@@ -155,6 +155,78 @@ 
			resets = <&cpg 407>;

		};



		dmac0: dma-controller@e6700000 {

			compatible = "renesas,dmac-r8a77995",

				     "renesas,rcar-dmac";

			reg = <0 0xe6700000 0 0x10000>;

			interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "error",

					"ch0", "ch1", "ch2", "ch3",

					"ch4", "ch5", "ch6", "ch7";

			clocks = <&cpg CPG_MOD 219>;

			clock-names = "fck";

			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;

			resets = <&cpg 219>;

			#dma-cells = <1>;

			dma-channels = <8>;

		};



		dmac1: dma-controller@e7300000 {

			compatible = "renesas,dmac-r8a77995",

				     "renesas,rcar-dmac";

			reg = <0 0xe7300000 0 0x10000>;

			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "error",

					"ch0", "ch1", "ch2", "ch3",

					"ch4", "ch5", "ch6", "ch7";

			clocks = <&cpg CPG_MOD 218>;

			clock-names = "fck";

			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;

			resets = <&cpg 218>;

			#dma-cells = <1>;

			dma-channels = <8>;

		};



		dmac2: dma-controller@e7310000 {

			compatible = "renesas,dmac-r8a77995",

				     "renesas,rcar-dmac";

			reg = <0 0xe7310000 0 0x10000>;

			interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH

				      GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "error",

					"ch0", "ch1", "ch2", "ch3",

					"ch4", "ch5", "ch6", "ch7";

			clocks = <&cpg CPG_MOD 217>;

			clock-names = "fck";

			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;

			resets = <&cpg 217>;

			#dma-cells = <1>;

			dma-channels = <8>;

		};



		gpio0: gpio@e6050000 {

			compatible = "renesas,gpio-r8a77995",

				     "renesas,rcar-gen3-gpio",

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