Commit 93e0e8ce authored by Jagan Teki's avatar Jagan Teki Committed by Heiko Stuebner
Browse files

arm64: dts: rockchip: Add Radxa ROCK Pi 4C support 



Rock PI 4C has AP6256 Wifi/BT, PoE, miniDP, USB Host enabled
GPIO pin change compared to 4B, 4C.

So, add or enable difference nodes/properties in 4C dts
by including common dtsi.

Signed-off-by: default avatarJagan Teki <jagan@amarulasolutions.com>
Link: https://lore.kernel.org/r/20200807094826.12019-4-jagan@amarulasolutions.com


Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent c1075b7f

arch/arm64/boot/dts/rockchip/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -35,6 +35,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc.dtb 
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc-mezzanine.dtb

dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4a.dtb

dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4b.dtb

dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock-pi-4c.dtb

dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock960.dtb

dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64-v2.dtb

dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb

arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts

0 → 100644
+51 −0
Original line number Diff line number Diff line 
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)

/*

 * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd

 * Copyright (c) 2019 Radxa Limited

 * Copyright (c) 2019 Amarula Solutions(India)

 */



/dts-v1/;

#include "rk3399-rock-pi-4.dtsi"



/ {

	model = "Radxa ROCK Pi 4C";

	compatible = "radxa,rockpi4c", "radxa,rockpi4", "rockchip,rk3399";

};



&sdio0 {

	status = "okay";



	brcmf: wifi@1 {

		compatible = "brcm,bcm4329-fmac";

		reg = <1>;

		interrupt-parent = <&gpio0>;

		interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;

		interrupt-names = "host-wake";

		pinctrl-names = "default";

		pinctrl-0 = <&wifi_host_wake_l>;

	};

};



&uart0 {

	status = "okay";



	bluetooth {

		compatible = "brcm,bcm43438-bt";

		clocks = <&rk808 1>;

		clock-names = "ext_clock";

		device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;

		host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;

		shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;

		pinctrl-names = "default";

		pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;

	};

};



&vcc5v0_host {

	gpio = <&gpio3 RK_PD6 GPIO_ACTIVE_HIGH>;

};



&vcc5v0_host_en {

	rockchip,pins = <3 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;

};

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