Commit 93bbd6c5 authored by Appana Durga Kedareswara rao's avatar Appana Durga Kedareswara rao Committed by Marc Kleine-Budde
Browse files

can: xilinx_can: xcanfd_rx(): fix FSR register handling in the RX path 



After commit c223da68 ("can: xilinx_can: Add support for CANFD FD
frames") the driver is updating the FSR IRI index multiple times (i.e in
xcanfd_rx() and xcan_rx_fifo_get_next_frame()), It should be updated
once per RX packet. This patch fixes this issue, also this patch removes
the unnecessary fsr register checks in xcanfd_rx() API.

Fixes: c223da68 ("can: xilinx_can: Add support for CANFD FD frames")
Reviewed-by: default avatarRadhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
Reviewed-by: default avatarShubhrajyoti Datta <Shubhrajyoti.datta@xilinx.com>
Signed-off-by: default avatarAppana Durga Kedareswara rao <appana.durga.rao@xilinx.com>
Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
Signed-off-by: default avatarMarc Kleine-Budde <mkl@pengutronix.de>
parent 6b0d3589

drivers/net/can/xilinx_can.c

+63 −76
Original line number Diff line number Diff line
@@ -808,10 +808,8 @@ static int xcanfd_rx(struct net_device *ndev, int frame_base) 
	u32 id_xcan, dlc, data[2] = {0, 0}, dwindex = 0, i, fsr, readindex;



	fsr = priv->read_reg(priv, XCAN_FSR_OFFSET);

	if (fsr & XCAN_FSR_FL_MASK) {

	readindex = fsr & XCAN_FSR_RI_MASK;

		id_xcan = priv->read_reg(priv,

					 XCAN_FRAME_ID_OFFSET(frame_base));

	id_xcan = priv->read_reg(priv, XCAN_FRAME_ID_OFFSET(frame_base));

	dlc = priv->read_reg(priv, XCAN_FRAME_DLC_OFFSET(frame_base));

	if (dlc & XCAN_DLCR_EDL_MASK)

		skb = alloc_canfd_skb(ndev, &cf);
@@ -862,38 +860,27 @@ static int xcanfd_rx(struct net_device *ndev, int frame_base) 
				data[0] = priv->read_reg(priv,

					(XCAN_RXMSG_FRAME_OFFSET(readindex) +

					(dwindex * XCANFD_DW_BYTES)));

				*(__be32 *)(cf->data + i) =

						cpu_to_be32(data[0]);

			*(__be32 *)(cf->data + i) = cpu_to_be32(data[0]);

			dwindex++;

		}

	} else {

		for (i = 0; i < cf->len; i += 4) {

			if (priv->devtype.flags & XCAN_FLAG_CANFD_2)

				data[0] = priv->read_reg(priv,

						XCAN_RXMSG_2_FRAME_OFFSET(readindex) + i);

					XCAN_RXMSG_2_FRAME_OFFSET(readindex) +

								  i);

			else

				data[0] = priv->read_reg(priv,

					XCAN_RXMSG_FRAME_OFFSET(readindex) + i);

				*(__be32 *)(cf->data + i) =

						cpu_to_be32(data[0]);

			*(__be32 *)(cf->data + i) = cpu_to_be32(data[0]);

		}

	}

		/* Update FSR Register so that next packet will save to

		 * buffer

		 */

		fsr = priv->read_reg(priv, XCAN_FSR_OFFSET);

		fsr |= XCAN_FSR_IRI_MASK;

		priv->write_reg(priv, XCAN_FSR_OFFSET, fsr);

		fsr = priv->read_reg(priv, XCAN_FSR_OFFSET);

	stats->rx_bytes += cf->len;

	stats->rx_packets++;

	netif_receive_skb(skb);



	return 1;

}

	/* If FSR Register is not updated with fill level */

	return 0;

}



/**

 * xcan_current_error_state - Get current error state from HW

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