Unverified Commit 937e6d75 authored by Sowjanya Komatineni's avatar Sowjanya Komatineni Committed by Mark Brown
Browse files

spi: expand mode support



This patch changes mode and mode_bits from u16 to u32 to allow more
mode configurations.

Signed-off-by: default avatarSowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent bf6e8396
Loading
Loading
Loading
Loading
+3 −3
Original line number Diff line number Diff line
@@ -143,7 +143,7 @@ struct spi_device {
	u32			max_speed_hz;
	u8			chip_select;
	u8			bits_per_word;
	u16			mode;
	u32			mode;
#define	SPI_CPHA	0x01			/* clock phase */
#define	SPI_CPOL	0x02			/* clock polarity */
#define	SPI_MODE_0	(0|0)			/* (original MicroWire) */
@@ -443,7 +443,7 @@ struct spi_controller {
	u16			dma_alignment;

	/* spi_device.mode flags understood by this controller driver */
	u16			mode_bits;
	u32			mode_bits;

	/* bitmask of supported bits_per_word for transfers */
	u32			bits_per_word_mask;
@@ -1291,7 +1291,7 @@ struct spi_board_info {
	/* mode becomes spi_device.mode, and is essential for chips
	 * where the default of SPI_CS_HIGH = 0 is wrong.
	 */
	u16		mode;
	u32		mode;

	/* ... may need additional spi_device chip config data here.
	 * avoid stuff protocol drivers can set; but include stuff