Commit 933de786 authored by Linus Walleij's avatar Linus Walleij Committed by David S. Miller
Browse files

net: dsa: rtl8366rb: Support port 4 (WAN) 



The totally undocumented IO mode needs to be set to enumerator
0 to enable port 4 also known as WAN in most configurations,
for ordinary traffic. The 3 bits in the register come up as
010 after reset, but need to be set to 000.

The Realtek source code contains a name for these bits, but
no explanation of what the 8 different IO modes may be.

Set it to zero for the time being and drop a comment so
people know what is going on if they run into trouble. This
"mode zero" works fine with the D-Link DIR-685 with
RTL8366RB.

Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent cd16e5b2

drivers/net/dsa/rtl8366rb.c

+30 −0
Original line number Diff line number Diff line
@@ -48,6 +48,23 @@ 
#define RTL8366RB_SSCR2				0x0004

#define RTL8366RB_SSCR2_DROP_UNKNOWN_DA		BIT(0)



/* Port Mode Control registers */

#define RTL8366RB_PMC0				0x0005

#define RTL8366RB_PMC0_SPI			BIT(0)

#define RTL8366RB_PMC0_EN_AUTOLOAD		BIT(1)

#define RTL8366RB_PMC0_PROBE			BIT(2)

#define RTL8366RB_PMC0_DIS_BISR			BIT(3)

#define RTL8366RB_PMC0_ADCTEST			BIT(4)

#define RTL8366RB_PMC0_SRAM_DIAG		BIT(5)

#define RTL8366RB_PMC0_EN_SCAN			BIT(6)

#define RTL8366RB_PMC0_P4_IOMODE_SHIFT		7

#define RTL8366RB_PMC0_P4_IOMODE_MASK		GENMASK(9, 7)

#define RTL8366RB_PMC0_P5_IOMODE_SHIFT		10

#define RTL8366RB_PMC0_P5_IOMODE_MASK		GENMASK(12, 10)

#define RTL8366RB_PMC0_SDSMODE_SHIFT		13

#define RTL8366RB_PMC0_SDSMODE_MASK		GENMASK(15, 13)

#define RTL8366RB_PMC1				0x0006



/* Port Mirror Control Register */

#define RTL8366RB_PMCR				0x0007

#define RTL8366RB_PMCR_SOURCE_PORT(a)		(a)
@@ -860,6 +877,19 @@ static int rtl8366rb_setup(struct dsa_switch *ds) 
	if (ret)

		return ret;



	/* Port 4 setup: this enables Port 4, usually the WAN port,

	 * common PHY IO mode is apparently mode 0, and this is not what

	 * the port is initialized to. There is no explanation of the

	 * IO modes in the Realtek source code, if your WAN port is

	 * connected to something exotic such as fiber, then this might

	 * be worth experimenting with.

	 */

	ret = regmap_update_bits(smi->map, RTL8366RB_PMC0,

				 RTL8366RB_PMC0_P4_IOMODE_MASK,

				 0 << RTL8366RB_PMC0_P4_IOMODE_SHIFT);

	if (ret)

		return ret;



	/* Discard VLAN tagged packets if the port is not a member of

	 * the VLAN with which the packets is associated.

	 */

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