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This patch provides bindings for the 64-bit timer in the KeyStone architecture devices. The timer can be configured as a general-purpose 64-bit timer, dual general-purpose 32-bit timers. When configured as dual 32-bit timers, each half can operate in conjunction (chain mode) or independently (unchained mode) of each other. It is global timer is a free running up-counter and can generate interrupt when the counter reaches preset counter values. Documentation: http://www.ti.com/lit/ug/sprugv5a/sprugv5a.pdf Acked-by:Rob Herring <robh@kernel.org> Acked-by:
Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by:
Ivan Khoronzhuk <ivan.khoronzhuk@ti.com> Signed-off-by:
Daniel Lezcano <daniel.lezcano@linaro.org>
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