Commit 9239c89b authored by Heiko Schocher's avatar Heiko Schocher Committed by Benjamin Herrenschmidt
Browse files

powerpc/82xx: mgcoge - updates for 2.6.32 



- add I2C support
- add FCC1 and FCC2 support
- fix bogus gpio numbering in plattform code

Signed-off-by: default avatarHeiko Schocher <hs@denx.de>
Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
parent 8640d3bf

arch/powerpc/boot/dts/mgcoge.dts

+53 −0
Original line number Diff line number Diff line
@@ -162,6 +162,59 @@ 
				fixed-link = <0 0 10 0 0>;

			};



			i2c@11860 {

				compatible = "fsl,mpc8272-i2c",

					     "fsl,cpm2-i2c";

				reg = <0x11860 0x20 0x8afc 0x2>;

				interrupts = <1 8>;

				interrupt-parent = <&PIC>;

				fsl,cpm-command = <0x29600000>;

				#address-cells = <1>;

				#size-cells = <0>;

			};



			mdio@10d40 {

				compatible = "fsl,cpm2-mdio-bitbang";

				reg = <0x10d00 0x14>;

				#address-cells = <1>;

				#size-cells = <0>;

				fsl,mdio-pin = <12>;

				fsl,mdc-pin = <13>;



				phy0: ethernet-phy@0 {

					reg = <0x0>;

				};



				phy1: ethernet-phy@1 {

					reg = <0x1>;

				};

			};



			/* FCC1 management to switch */

			ethernet@11300 {

				device_type = "network";

				compatible = "fsl,cpm2-fcc-enet";

				reg = <0x11300 0x20 0x8400 0x100 0x11390 0x1>;

				local-mac-address = [ 00 01 02 03 04 07 ];

				interrupts = <32 8>;

				interrupt-parent = <&PIC>;

				phy-handle = <&phy0>;

				linux,network-index = <1>;

				fsl,cpm-command = <0x12000300>;

			};



			/* FCC2 to redundant core unit over backplane */

			ethernet@11320 {

				device_type = "network";

				compatible = "fsl,cpm2-fcc-enet";

				reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>;

				local-mac-address = [ 00 01 02 03 04 08 ];

				interrupts = <33 8>;

				interrupt-parent = <&PIC>;

				phy-handle = <&phy1>;

				linux,network-index = <2>;

				fsl,cpm-command = <0x16200300>;

			};

		};



		PIC: interrupt-controller@10c00 {

arch/powerpc/platforms/82xx/mgcoge.c

+60 −9
Original line number Diff line number Diff line
@@ -50,16 +50,63 @@ struct cpm_pin { 
static __initdata struct cpm_pin mgcoge_pins[] = {



	/* SMC2 */

	{1, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},

	{1, 9, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},

	{0, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},

	{0, 9, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},



	/* SCC4 */

	{3, 25, CPM_PIN_INPUT | CPM_PIN_PRIMARY},

	{3, 24, CPM_PIN_INPUT | CPM_PIN_PRIMARY},

	{3,  9, CPM_PIN_INPUT | CPM_PIN_PRIMARY},

	{3,  8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},

	{4, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},

	{4, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},

	{2, 25, CPM_PIN_INPUT | CPM_PIN_PRIMARY},

	{2, 24, CPM_PIN_INPUT | CPM_PIN_PRIMARY},

	{2,  9, CPM_PIN_INPUT | CPM_PIN_PRIMARY},

	{2,  8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},

	{3, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},

	{3, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},



	/* FCC1 */

	{0, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY},

	{0, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},

	{0, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},

	{0, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},

	{0, 18, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},

	{0, 19, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},

	{0, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},

	{0, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},

	{0, 26, CPM_PIN_INPUT | CPM_PIN_SECONDARY},

	{0, 27, CPM_PIN_INPUT | CPM_PIN_SECONDARY},

	{0, 28, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},

	{0, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},

	{0, 30, CPM_PIN_INPUT | CPM_PIN_SECONDARY},

	{0, 31, CPM_PIN_INPUT | CPM_PIN_SECONDARY},



	{2, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},

	{2, 23, CPM_PIN_INPUT | CPM_PIN_PRIMARY},



	/* FCC2 */

	{1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},

	{1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},

	{1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},

	{1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},

	{1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},

	{1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},

	{1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},

	{1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},

	{1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},

	{1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},

	{1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},

	{1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},

	{1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},

	{1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},



	{2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},

	{2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},



	/* MDC */

	{0, 13, CPM_PIN_OUTPUT | CPM_PIN_GPIO},



#if defined(CONFIG_I2C_CPM)

	/* I2C */

	{3, 14, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN},

	{3, 15, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN},

#endif

};



static void __init init_ioports(void)
@@ -68,12 +115,16 @@ static void __init init_ioports(void) 


	for (i = 0; i < ARRAY_SIZE(mgcoge_pins); i++) {

		const struct cpm_pin *pin = &mgcoge_pins[i];

		cpm2_set_pin(pin->port - 1, pin->pin, pin->flags);

		cpm2_set_pin(pin->port, pin->pin, pin->flags);

	}



	cpm2_smc_clk_setup(CPM_CLK_SMC2, CPM_BRG8);

	cpm2_clk_setup(CPM_CLK_SCC4, CPM_CLK7, CPM_CLK_RX);

	cpm2_clk_setup(CPM_CLK_SCC4, CPM_CLK8, CPM_CLK_TX);

	cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK10, CPM_CLK_RX);

	cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK9,  CPM_CLK_TX);

	cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX);

	cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX);

}



static void __init mgcoge_setup_arch(void)

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