Commit 923769f7 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'v4.20-rockchip-dts64-1' of... 

Merge tag 'v4.20-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

New soc support for the px30 quad-core Cortex-A35.
New boards are the px30 eval board and roc-rk3399-pc.
The rk3328 got support for the one gpio controlled via the general
register files and the rk3399 finally got its idle-states defined.
And finally fixes and improvements for firefly-rk3399 (wifi),
roc-rk3328-cc (sdmmc-uhs, io-domains), rk3328-rock64 (gpio-regulator
pin fix) and rk3399-sapphire (gpio-regulator pin fix, pmic pin fix
and type-c port supply).

* tag 'v4.20-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip

:
  arm64: dts: rockchip: Add type-c port supply on rk3399-sapphire board
  arm64: dts: rockchip: fix vcc_host1_5v pin assign on rk3328-rock64
  arm64: dts: rockchip: add WiFi module support for Firefly-RK3399
  arm64: dts: rockchip: remove dvs2 pinctrl from pmic on rk3399-sapphire
  arm64: dts: rockchip: Fix VCC5V0_HOST_EN on rk3399-sapphire
  arm64: dts: rockchip: re-order vcc_sys on rk3399-sapphire
  arm64: dts: rockchip: add missing vop properties for px30
  arm64: dts: rockchip: Add idle-states to device tree for rk3399
  arm64: dts: rockchip: add sdmmc UHS support for roc-rk3328-cc
  arm64: dts: rockchip: add GRF GPIO controller to rk3328
  arm64: dts: rockchip: add io-domain to roc-rk3328-cc
  arm64: dts: rockchip: add PX30 evaluation board devicetree
  arm64: dts: rockchip: add core dtsi file for PX30 SoCs
  dt-bindings: rockchip: grf: add grf and pmugrf description for px30
  arm64: dts: rockchip: add support for ROC-RK3399-PC board

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 89cb3a4c 78f26da3

Documentation/devicetree/bindings/arm/rockchip.txt

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Original line number Diff line number Diff line
@@ -59,6 +59,10 @@ Rockchip platforms device tree bindings 
    Required root node properties:

      - compatible = "firefly,roc-rk3328-cc", "rockchip,rk3328";



- Firefly ROC-RK3399-PC board:

    Required root node properties:

      - compatible = "firefly,roc-rk3399-pc", "rockchip,rk3399";



- ChipSPARK PopMetal-RK3288 board:

    Required root node properties:

      - compatible = "chipspark,popmetal-rk3288", "rockchip,rk3288";
@@ -168,6 +172,10 @@ Rockchip platforms device tree bindings 
    Required root node properties:

      - compatible = "rockchip,px5-evb", "rockchip,px5", "rockchip,rk3368";



- Rockchip PX30 Evaluation board:

    Required root node properties:

      - compatible = "rockchip,px30-evb", "rockchip,px30";



- Rockchip RV1108 Evaluation board

    Required root node properties:

      - compatible = "rockchip,rv1108-evb", "rockchip,rv1108";

Documentation/devicetree/bindings/soc/rockchip/grf.txt

+2 −0
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@ On RK3328 SoCs, the GRF adds a section for USB2PHYGRF, 
Required Properties:



- compatible: GRF should be one of the following:

   - "rockchip,px30-grf", "syscon": for px30

   - "rockchip,rk3036-grf", "syscon": for rk3036

   - "rockchip,rk3066-grf", "syscon": for rk3066

   - "rockchip,rk3188-grf", "syscon": for rk3188
@@ -23,6 +24,7 @@ Required Properties: 
   - "rockchip,rk3399-grf", "syscon": for rk3399

   - "rockchip,rv1108-grf", "syscon": for rv1108

- compatible: PMUGRF should be one of the following:

   - "rockchip,px30-pmugrf", "syscon": for px30

   - "rockchip,rk3368-pmugrf", "syscon": for rk3368

   - "rockchip,rk3399-pmugrf", "syscon": for rk3399

- compatible: SGRF should be one of the following

arch/arm64/boot/dts/rockchip/Makefile

+2 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: GPL-2.0

dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb.dtb

dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb

dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb

dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-roc-cc.dtb
@@ -14,5 +15,6 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-firefly.dtb 
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-bob.dtb

dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin.dtb

dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb

dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc.dtb

dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire.dtb

dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb

arch/arm64/boot/dts/rockchip/px30-evb.dts

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)

/*

 * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd

 */



/dts-v1/;

#include <dt-bindings/gpio/gpio.h>

#include <dt-bindings/input/input.h>

#include <dt-bindings/pinctrl/rockchip.h>

#include "px30.dtsi"



/ {

	model = "Rockchip PX30 EVB";

	compatible = "rockchip,px30-evb", "rockchip,px30";



	chosen {

		stdout-path = "serial2:1500000n8";

	};



	adc-keys {

		compatible = "adc-keys";

		io-channels = <&saradc 2>;

		io-channel-names = "buttons";

		keyup-threshold-microvolt = <1800000>;

		poll-interval = <100>;



		esc-key {

			label = "esc";

			linux,code = <KEY_ESC>;

			press-threshold-microvolt = <1310000>;

		};



		home-key {

			label = "home";

			linux,code = <KEY_HOME>;

			press-threshold-microvolt = <624000>;

		};



		menu-key {

			label = "menu";

			linux,code = <KEY_MENU>;

			press-threshold-microvolt = <987000>;

		};



		vol-down-key {

			label = "volume down";

			linux,code = <KEY_VOLUMEDOWN>;

			press-threshold-microvolt = <300000>;

		};



		vol-up-key {

			label = "volume up";

			linux,code = <KEY_VOLUMEUP>;

			press-threshold-microvolt = <17000>;

		};

	};



	backlight: backlight {

		compatible = "pwm-backlight";

		pwms = <&pwm1 0 25000 0>;

	};



	sdio_pwrseq: sdio-pwrseq {

		compatible = "mmc-pwrseq-simple";

		pinctrl-names = "default";

		pinctrl-0 = <&wifi_enable_h>;



		/*

		 * On the module itself this is one of these (depending

		 * on the actual card populated):

		 * - SDIO_RESET_L_WL_REG_ON

		 * - PDN (power down when low)

		 */

		reset-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>; /* GPIO3_A4 */

	};



	vcc_phy: vcc-phy-regulator {

		compatible = "regulator-fixed";

		regulator-name = "vcc_phy";

		regulator-always-on;

		regulator-boot-on;

	};



	vcc5v0_sys: vccsys {

		compatible = "regulator-fixed";

		regulator-name = "vcc5v0_sys";

		regulator-always-on;

		regulator-boot-on;

		regulator-min-microvolt = <5000000>;

		regulator-max-microvolt = <5000000>;

	};

};



&display_subsystem {

	status = "okay";

};



&emmc {

	bus-width = <8>;

	cap-mmc-highspeed;

	mmc-hs200-1_8v;

	non-removable;

	status = "okay";

};



&gmac {

	clock_in_out = "output";

	phy-supply = <&vcc_phy>;

	snps,reset-gpio = <&gpio2 13 GPIO_ACTIVE_LOW>;

	snps,reset-active-low;

	snps,reset-delays-us = <0 50000 50000>;

	status = "okay";

};



&i2c0 {

	status = "okay";

};



&i2s1_2ch {

	status = "okay";

};



&io_domains {

	status = "okay";

};



&pinctrl {

	headphone {

		hp_det: hp-det {

			rockchip,pins =

				<2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>;

		};

	};



	pmic {

		pmic_int: pmic_int {

			rockchip,pins =

				<0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;

		};



		soc_slppin_gpio: soc_slppin_gpio {

			rockchip,pins =

				<0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>;

		};



		soc_slppin_slp: soc_slppin_slp {

			rockchip,pins =

				<0 RK_PA4 RK_FUNC_1 &pcfg_pull_none>;

		};



		soc_slppin_rst: soc_slppin_rst {

			rockchip,pins =

				<0 RK_PA4 RK_FUNC_2 &pcfg_pull_none>;

		};

	};



	sdio-pwrseq {

		wifi_enable_h: wifi-enable-h {

			rockchip,pins =

				<0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;

		};

	};

};



&pmu_io_domains {

	status = "okay";

};



&pwm1 {

	status = "okay";

};



&saradc {

	status = "okay";

};



&sdmmc {

	bus-width = <4>;

	cap-mmc-highspeed;

	cap-sd-highspeed;

	card-detect-delay = <800>;

	sd-uhs-sdr12;

	sd-uhs-sdr25;

	sd-uhs-sdr50;

	sd-uhs-sdr104;

	status = "okay";

};



&sdio {

	bus-width = <4>;

	cap-sd-highspeed;

	keep-power-in-suspend;

	non-removable;

	mmc-pwrseq = <&sdio_pwrseq>;

	sd-uhs-sdr104;

	status = "okay";

};



&uart1 {

	pinctrl-names = "default";

	pinctrl-0 = <&uart1_xfer &uart1_cts>;

	status = "okay";

};



&uart2 {

	status = "okay";

};



&usb_host0_ehci {

	status = "okay";

};



&usb_host0_ohci {

	status = "okay";

};



&vopb {

	status = "okay";

};



&vopb_mmu {

	status = "okay";

};



&vopl {

	status = "okay";

};



&vopl_mmu {

	status = "okay";

};

arch/arm64/boot/dts/rockchip/px30.dtsi

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File added.

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