Commit 922584f6 authored by Hao Zheng's avatar Hao Zheng Committed by David S. Miller
Browse files

octeontx2-af: Update NPC KPU packet parsing profile 



Updated NPC KPU packet parsing profile with support for following

- Fragmentation support for IPv4 IPv6 outer header
- NIX instruction header support
- QinQ with TPID of 0x8100 as non inner most vlan tag, as legacy
  network equipments still generate QinQ packets with this configuration.
- To better support RSS for tunnelled packets, udp based tunnel
  protocols such as vxlan, vxlan-gpe, geneve and gtpu are now
  captured into a separate layer E. Consequently, the inner
  packet headers are pushed one layer down to LF, LG, and LH
  accordingly.
- Support for rfc7510 mpls in udp. Up to 4 MPLS labels can be parsed
  and captured in one layer LE.
- Parser support for DSA, extended DSA and eDSA tags right after
  ethernet header by Marvell SOHO and Falcon switches. For extended
  DSA and eDSA tags, a special PKIND of 62 is used, as these tags don't
  contain a tpid field.
- Higig2 protocol header parsing support, added a NPC_LT_LA_HIGIG2_ETHER
  for a combined header of HIGIG2 and Ethernet.  Add a
  NPC_LT_LA_IH_NIX_HIGIG2_ETHER for a combined header of nix_ih,
  HIGIG2 and Ethernet on egress side. Also added 2 upper flags in LA to
  indicate the presence of nix_ih and HIGIG2.

Other changes include
- IPv4.TTL==0 IPv6.HLIM==0 check
- Per RFC 1858, mark fragment offset == 1 as error
- TCP invalid flags check
- Separate error codes for outer and inner IPv4 checksum errors.
- Fix a parser error when KPU parses incoming IPSec ESP and AH packets
- NPC vtag capture/strip hardware expect tag pointer to point to
  tpid/ethertype instead of tci. So move lb_ptr to point to tpid/ethertype.
- Fix npc parser error when parsing udp packets that don't have any payload.
- For a single MCAM entry to match on packets with one or stacked vlan tags
  combine NPC_LT_LB_STAG and NPC_LT_LB_QINQ to NPC_LT_LB_STAG_QINQ.
- NVGRE to have a separate ltype LD_NVGRE instead of combined with LD_GRE.
- Reserve top LD/LTYPEs to support custom KPU profile fields.

Signed-off-by: default avatarHao Zheng <haoz@marvell.com>
Signed-off-by: default avatarSunil Goutham <sgoutham@marvell.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent c6614738

drivers/net/ethernet/marvell/octeontx2/af/npc.h

+66 −29
Original line number Diff line number Diff line
@@ -27,26 +27,45 @@ enum NPC_LID_E { 
enum npc_kpu_la_ltype {

	NPC_LT_LA_8023 = 1,

	NPC_LT_LA_ETHER,

	NPC_LT_LA_IH_NIX_ETHER,

	NPC_LT_LA_IH_8_ETHER,

	NPC_LT_LA_IH_4_ETHER,

	NPC_LT_LA_IH_2_ETHER,

	NPC_LT_LA_HIGIG2_ETHER,

	NPC_LT_LA_IH_NIX_HIGIG2_ETHER,

	NPC_LT_LA_CUSTOM0 = 0xE,

	NPC_LT_LA_CUSTOM1 = 0xF,

};



enum npc_kpu_lb_ltype {

	NPC_LT_LB_ETAG = 1,

	NPC_LT_LB_CTAG,

	NPC_LT_LB_STAG,

	NPC_LT_LB_STAG_QINQ,

	NPC_LT_LB_BTAG,

	NPC_LT_LB_QINQ,

	NPC_LT_LB_ITAG,

	NPC_LT_LB_DSA,

	NPC_LT_LB_DSA_VLAN,

	NPC_LT_LB_EDSA,

	NPC_LT_LB_EDSA_VLAN,

	NPC_LT_LB_EXDSA,

	NPC_LT_LB_EXDSA_VLAN,

	NPC_LT_LB_CUSTOM0 = 0xE,

	NPC_LT_LB_CUSTOM1 = 0xF,

};



enum npc_kpu_lc_ltype {

	NPC_LT_LC_IP = 1,

	NPC_LT_LC_IP_OPT,

	NPC_LT_LC_IP6,

	NPC_LT_LC_IP6_EXT,

	NPC_LT_LC_ARP,

	NPC_LT_LC_RARP,

	NPC_LT_LC_MPLS,

	NPC_LT_LC_NSH,

	NPC_LT_LC_PTP,

	NPC_LT_LC_FCOE,

	NPC_LT_LC_CUSTOM0 = 0xE,

	NPC_LT_LC_CUSTOM1 = 0xF,

};



/* Don't modify Ltypes upto SCTP, otherwise it will
@@ -57,49 +76,67 @@ enum npc_kpu_ld_ltype { 
	NPC_LT_LD_UDP,

	NPC_LT_LD_ICMP,

	NPC_LT_LD_SCTP,

	NPC_LT_LD_IGMP,

	NPC_LT_LD_ICMP6,

	NPC_LT_LD_IGMP = 8,

	NPC_LT_LD_ESP,

	NPC_LT_LD_AH,

	NPC_LT_LD_GRE,

	NPC_LT_LD_GRE_MPLS,

	NPC_LT_LD_GRE_NSH,

	NPC_LT_LD_TU_MPLS,

	NPC_LT_LD_NVGRE,

	NPC_LT_LD_NSH,

	NPC_LT_LD_TU_MPLS_IN_NSH,

	NPC_LT_LD_TU_MPLS_IN_IP,

	NPC_LT_LD_CUSTOM0 = 0xE,

	NPC_LT_LD_CUSTOM1 = 0xF,

};



enum npc_kpu_le_ltype {

	NPC_LT_LE_TU_ETHER = 1,

	NPC_LT_LE_TU_PPP,

	NPC_LT_LE_TU_MPLS_IN_NSH,

	NPC_LT_LE_TU_3RD_NSH,

	NPC_LT_LE_VXLAN = 1,

	NPC_LT_LE_GENEVE,

	NPC_LT_LE_GTPU = 4,

	NPC_LT_LE_VXLANGPE,

	NPC_LT_LE_GTPC,

	NPC_LT_LE_NSH,

	NPC_LT_LE_TU_MPLS_IN_GRE,

	NPC_LT_LE_TU_NSH_IN_GRE,

	NPC_LT_LE_TU_MPLS_IN_UDP,

	NPC_LT_LE_CUSTOM0 = 0xE,

	NPC_LT_LE_CUSTOM1 = 0xF,

};



enum npc_kpu_lf_ltype {

	NPC_LT_LF_TU_IP = 1,

	NPC_LT_LF_TU_IP6,

	NPC_LT_LF_TU_ARP,

	NPC_LT_LF_TU_MPLS_IP,

	NPC_LT_LF_TU_MPLS_IP6,

	NPC_LT_LF_TU_MPLS_ETHER,

	NPC_LT_LF_TU_ETHER = 1,

	NPC_LT_LF_TU_PPP,

	NPC_LT_LF_TU_MPLS_IN_VXLANGPE,

	NPC_LT_LF_TU_NSH_IN_VXLANGPE,

	NPC_LT_LF_TU_MPLS_IN_NSH,

	NPC_LT_LF_TU_3RD_NSH,

	NPC_LT_LF_CUSTOM0 = 0xE,

	NPC_LT_LF_CUSTOM1 = 0xF,

};



enum npc_kpu_lg_ltype {

	NPC_LT_LG_TU_TCP = 1,

	NPC_LT_LG_TU_UDP,

	NPC_LT_LG_TU_SCTP,

	NPC_LT_LG_TU_ICMP,

	NPC_LT_LG_TU_IGMP,

	NPC_LT_LG_TU_ICMP6,

	NPC_LT_LG_TU_ESP,

	NPC_LT_LG_TU_AH,

	NPC_LT_LG_TU_IP = 1,

	NPC_LT_LG_TU_IP6,

	NPC_LT_LG_TU_ARP,

	NPC_LT_LG_TU_ETHER_IN_NSH,

	NPC_LT_LG_CUSTOM0 = 0xE,

	NPC_LT_LG_CUSTOM1 = 0xF,

};



/* Don't modify Ltypes upto SCTP, otherwise it will

 * effect flow tag calculation and thus RSS.

 */

enum npc_kpu_lh_ltype {

	NPC_LT_LH_TCP_DATA = 1,

	NPC_LT_LH_HTTP_DATA,

	NPC_LT_LH_HTTPS_DATA,

	NPC_LT_LH_PPTP_DATA,

	NPC_LT_LH_UDP_DATA,

	NPC_LT_LH_TU_TCP = 1,

	NPC_LT_LH_TU_UDP,

	NPC_LT_LH_TU_ICMP,

	NPC_LT_LH_TU_SCTP,

	NPC_LT_LH_TU_ICMP6,

	NPC_LT_LH_TU_IGMP = 8,

	NPC_LT_LH_TU_ESP,

	NPC_LT_LH_TU_AH,

	NPC_LT_LH_CUSTOM0 = 0xE,

	NPC_LT_LH_CUSTOM1 = 0xF,

};



struct npc_kpu_profile_cam {

drivers/net/ethernet/marvell/octeontx2/af/npc_profile.h

+11177 −3769

File changed.

Preview size limit exceeded, changes collapsed.

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

+5 −5
Original line number Diff line number Diff line
@@ -2763,23 +2763,23 @@ int rvu_nix_init(struct rvu *rvu) 
		rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_OIP4,

			    (NPC_LID_LC << 8) | (NPC_LT_LC_IP << 4) | 0x0F);

		rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_IIP4,

			    (NPC_LID_LF << 8) | (NPC_LT_LF_TU_IP << 4) | 0x0F);

			    (NPC_LID_LG << 8) | (NPC_LT_LG_TU_IP << 4) | 0x0F);

		rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_OIP6,

			    (NPC_LID_LC << 8) | (NPC_LT_LC_IP6 << 4) | 0x0F);

		rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_IIP6,

			    (NPC_LID_LF << 8) | (NPC_LT_LF_TU_IP6 << 4) | 0x0F);

			    (NPC_LID_LG << 8) | (NPC_LT_LG_TU_IP6 << 4) | 0x0F);

		rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_OTCP,

			    (NPC_LID_LD << 8) | (NPC_LT_LD_TCP << 4) | 0x0F);

		rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_ITCP,

			    (NPC_LID_LG << 8) | (NPC_LT_LG_TU_TCP << 4) | 0x0F);

			    (NPC_LID_LH << 8) | (NPC_LT_LH_TU_TCP << 4) | 0x0F);

		rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_OUDP,

			    (NPC_LID_LD << 8) | (NPC_LT_LD_UDP << 4) | 0x0F);

		rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_IUDP,

			    (NPC_LID_LG << 8) | (NPC_LT_LG_TU_UDP << 4) | 0x0F);

			    (NPC_LID_LH << 8) | (NPC_LT_LH_TU_UDP << 4) | 0x0F);

		rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_OSCTP,

			    (NPC_LID_LD << 8) | (NPC_LT_LD_SCTP << 4) | 0x0F);

		rvu_write64(rvu, blkaddr, NIX_AF_RX_DEF_ISCTP,

			    (NPC_LID_LG << 8) | (NPC_LT_LG_TU_SCTP << 4) |

			    (NPC_LID_LH << 8) | (NPC_LT_LH_TU_SCTP << 4) |

			    0x0F);



		err = nix_rx_flowkey_alg_cfg(rvu, blkaddr);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c

+4 −5
Original line number Diff line number Diff line
@@ -354,8 +354,8 @@ void rvu_npc_install_ucast_entry(struct rvu *rvu, u16 pcifunc, 
			      NIX_INTF_RX, &entry, true);



	/* add VLAN matching, setup action and save entry back for later */

	entry.kw[0] |= (NPC_LT_LB_STAG | NPC_LT_LB_CTAG) << 20;

	entry.kw_mask[0] |= (NPC_LT_LB_STAG & NPC_LT_LB_CTAG) << 20;

	entry.kw[0] |= (NPC_LT_LB_STAG_QINQ | NPC_LT_LB_CTAG) << 20;

	entry.kw_mask[0] |= (NPC_LT_LB_STAG_QINQ & NPC_LT_LB_CTAG) << 20;



	entry.vtag_action = VTAG0_VALID_BIT |

			    FIELD_PREP(VTAG0_TYPE_MASK, 0) |
@@ -704,8 +704,7 @@ static void npc_config_ldata_extract(struct rvu *rvu, int blkaddr) 
	/* Layer B: Stacked VLAN (STAG|QinQ) */

	/* CTAG VLAN[2..3] + Ethertype, 4 bytes, KW0[63:32] */

	cfg = KEX_LD_CFG(0x03, 0x4, 0x1, 0x0, 0x4);

	SET_KEX_LD(NIX_INTF_RX, NPC_LID_LB, NPC_LT_LB_STAG, 0, cfg);

	SET_KEX_LD(NIX_INTF_RX, NPC_LID_LB, NPC_LT_LB_QINQ, 0, cfg);

	SET_KEX_LD(NIX_INTF_RX, NPC_LID_LB, NPC_LT_LB_STAG_QINQ, 0, cfg);



	/* Layer C: IPv4 */

	/* SIP+DIP: 8 bytes, KW2[63:0] */
@@ -1151,7 +1150,7 @@ int rvu_npc_init(struct rvu *rvu) 


	/* Config Inner IPV4 NPC layer info */

	rvu_write64(rvu, blkaddr, NPC_AF_PCK_DEF_IIP4,

		    (NPC_LID_LF << 8) | (NPC_LT_LF_TU_IP << 4) | 0x0F);

		    (NPC_LID_LG << 8) | (NPC_LT_LG_TU_IP << 4) | 0x0F);



	/* Enable below for Rx pkts.

	 * - Outer IPv4 header checksum validation.

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