Commit 9214cbe5 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'dt-3.11-5' of git://git.infradead.org/users/jcooper/linux into next/dt 

From Jason Cooper:
mvebu dt changes for v3.11 (round 5)
 - mvebu
    - set aliases for ethernet interfaces
    - PCIe range for armada-xp-db
    - rm unused properties on A370
 - kirkwood
    - assign sheevaplug pinmuxs to correct devices
    - enable second PCIe port for ts219

* tag 'dt-3.11-5' of git://git.infradead.org/users/jcooper/linux

:
  ARM: Kirkwood: ts219: Enable second PCIe port in DT.
  ARM: mvebu: Remove device tree unused properties on A370
  arm: mvebu: armada-xp-db: ensure PCIe range is specified
  arm: kirkwood: sheevaplug: move pinmux configs to the right devices
  ARM: mvebu: set aliases for ethernet controllers

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 1e76c7cb 918f8f30

arch/arm/boot/dts/armada-370-xp.dtsi

+7 −2
Original line number Diff line number Diff line
@@ -22,6 +22,11 @@ 
	model = "Marvell Armada 370 and XP SoC";

	compatible = "marvell,armada-370-xp";



	aliases {

		eth0 = &eth0;

		eth1 = &eth1;

	};



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;
@@ -98,7 +103,7 @@ 
				reg = <0x72004 0x4>;

			};



			ethernet@70000 {

			eth0: ethernet@70000 {

				compatible = "marvell,armada-370-neta";

				reg = <0x70000 0x2500>;

				interrupts = <8>;
@@ -106,7 +111,7 @@ 
				status = "disabled";

			};



			ethernet@74000 {

			eth1: ethernet@74000 {

				compatible = "marvell,armada-370-neta";

				reg = <0x74000 0x2500>;

				interrupts = <10>;

arch/arm/boot/dts/armada-370.dtsi

+0 −4
Original line number Diff line number Diff line
@@ -180,10 +180,6 @@ 


				bus-range = <0x00 0xff>;



				reg = <0x40000 0x2000>, <0x80000 0x2000>;



				reg-names = "pcie0.0", "pcie1.0";



				ranges = <0x82000000 0 0x40000 0x40000 0 0x00002000   /* Port 0.0 registers */

					0x82000000 0 0x80000 0x80000 0 0x00002000   /* Port 1.0 registers */

					0x82000000 0 0xe0000000 0xe0000000 0 0x08000000   /* non-prefetchable memory */

arch/arm/boot/dts/armada-xp-db.dts

+1 −0
Original line number Diff line number Diff line
@@ -31,6 +31,7 @@ 


	soc {

		ranges = <0          0 0xd0000000 0x100000	/* Internal registers 1MiB */

			  0xe0000000 0 0xe0000000 0x8100000     /* PCIe */

			  0xf0000000 0 0xf0000000 0x1000000>;	/* Device Bus, NOR 16MiB   */



		internal-regs {

arch/arm/boot/dts/armada-xp-mv78460.dtsi

+2 −1
Original line number Diff line number Diff line
@@ -23,6 +23,7 @@ 
		gpio0 = &gpio0;

		gpio1 = &gpio1;

		gpio2 = &gpio2;

		eth3 = &eth3;

	};
@@ -105,7 +106,7 @@ 
				interrupts = <91>;

			};



			ethernet@34000 {

			eth3: ethernet@34000 {

				compatible = "marvell,armada-370-neta";

				reg = <0x34000 0x2500>;

				interrupts = <14>;

arch/arm/boot/dts/armada-xp.dtsi

+5 −1
Original line number Diff line number Diff line
@@ -22,6 +22,10 @@ 
	model = "Marvell Armada XP family SoC";

	compatible = "marvell,armadaxp", "marvell,armada-370-xp";



	aliases {

		eth2 = &eth2;

	};



	soc {

		internal-regs {

			L2: l2-cache {
@@ -86,7 +90,7 @@ 
				reg = <0x18200 0x500>;

			};



			ethernet@30000 {

			eth2: ethernet@30000 {

				compatible = "marvell,armada-370-neta";

				reg = <0x30000 0x2500>;

				interrupts = <12>;

CRA Git | Maintained and supported by SUSTech CRA and CCSE