Commit 91f85e8f authored by Sam Ravnborg's avatar Sam Ravnborg
Browse files

drm/mga: drop dependency on drm_os_linux.h 



Opencode all macros used from the deprecated drm_os_linux.h header file.
The DRM_WAIT_ON used 3 * HZ as timeout.
This was translated to 3000 msec.

The return value of mga_driver_fence_wait() was not
used, so make it return void to simplify code a bit.

v2:
- fixed timeout to 3000 msec (original value was 3 * Hz)
- drop unused return value from mga_driver_fence_wait()

Signed-off-by: default avatarSam Ravnborg <sam@ravnborg.org>
Acked-by: default avatarThomas Zimmermann <tzimmermann@suse.de>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: David Airlie <airlied@linux.ie>
Link: https://patchwork.freedesktop.org/patch/msgid/20190623103542.30697-2-sam@ravnborg.org
parent 583bbf46

drivers/gpu/drm/mga/mga_dma.c

+7 −4
Original line number Diff line number Diff line
@@ -35,6 +35,8 @@ 
 * \author Gareth Hughes <gareth@valinux.com>

 */



#include <linux/delay.h>



#include <drm/drmP.h>

#include <drm/mga_drm.h>

#include "mga_drv.h"
@@ -62,7 +64,7 @@ int mga_do_wait_for_idle(drm_mga_private_t *dev_priv) 
			MGA_WRITE8(MGA_CRTC_INDEX, 0);

			return 0;

		}

		DRM_UDELAY(1);

		udelay(1);

	}



#if MGA_DMA_DEBUG
@@ -114,7 +116,7 @@ void mga_do_dma_flush(drm_mga_private_t *dev_priv) 
		status = MGA_READ(MGA_STATUS) & MGA_ENGINE_IDLE_MASK;

		if (status == MGA_ENDPRDMASTS)

			break;

		DRM_UDELAY(1);

		udelay(1);

	}



	if (primary->tail == primary->last_flush) {
@@ -1120,7 +1122,7 @@ int mga_dma_buffers(struct drm_device *dev, void *data, 
	 */

	if (d->send_count != 0) {

		DRM_ERROR("Process %d trying to send %d buffers via drmDMA\n",

			  DRM_CURRENTPID, d->send_count);

			  task_pid_nr(current), d->send_count);

		return -EINVAL;

	}
@@ -1128,7 +1130,8 @@ int mga_dma_buffers(struct drm_device *dev, void *data, 
	 */

	if (d->request_count < 0 || d->request_count > dma->buf_count) {

		DRM_ERROR("Process %d trying to get %d buffers (of %d max)\n",

			  DRM_CURRENTPID, d->request_count, dma->buf_count);

			  task_pid_nr(current), d->request_count,

			  dma->buf_count);

		return -EINVAL;

	}

drivers/gpu/drm/mga/mga_drv.h

+9 −5
Original line number Diff line number Diff line
@@ -188,7 +188,7 @@ extern int mga_warp_init(drm_mga_private_t *dev_priv); 
extern int mga_enable_vblank(struct drm_device *dev, unsigned int pipe);

extern void mga_disable_vblank(struct drm_device *dev, unsigned int pipe);

extern u32 mga_get_vblank_counter(struct drm_device *dev, unsigned int pipe);

extern int mga_driver_fence_wait(struct drm_device *dev, unsigned int *sequence);

extern void mga_driver_fence_wait(struct drm_device *dev, unsigned int *sequence);

extern int mga_driver_vblank_wait(struct drm_device *dev, unsigned int *sequence);

extern irqreturn_t mga_driver_irq_handler(int irq, void *arg);

extern void mga_driver_irq_preinstall(struct drm_device *dev);
@@ -199,10 +199,14 @@ extern long mga_compat_ioctl(struct file *filp, unsigned int cmd, 


#define mga_flush_write_combine()	wmb()



#define MGA_READ8(reg)		DRM_READ8(dev_priv->mmio, (reg))

#define MGA_READ(reg)		DRM_READ32(dev_priv->mmio, (reg))

#define MGA_WRITE8(reg, val)	DRM_WRITE8(dev_priv->mmio, (reg), (val))

#define MGA_WRITE(reg, val)	DRM_WRITE32(dev_priv->mmio, (reg), (val))

#define MGA_READ8(reg) \

	readb(((void __iomem *)dev_priv->mmio->handle) + (reg))

#define MGA_READ(reg) \

	readl(((void __iomem *)dev_priv->mmio->handle) + (reg))

#define MGA_WRITE8(reg, val) \

	writeb(val, ((void __iomem *)dev_priv->mmio->handle) + (reg))

#define MGA_WRITE(reg, val) \

	writel(val, ((void __iomem *)dev_priv->mmio->handle) + (reg))



#define DWGREG0		0x1c00

#define DWGREG0_END	0x1dff

drivers/gpu/drm/mga/mga_irq.c

+4 −6
Original line number Diff line number Diff line
@@ -118,23 +118,21 @@ void mga_disable_vblank(struct drm_device *dev, unsigned int pipe) 
	/* MGA_WRITE(MGA_IEN, MGA_VLINEIEN | MGA_SOFTRAPEN); */

}



int mga_driver_fence_wait(struct drm_device *dev, unsigned int *sequence)

void mga_driver_fence_wait(struct drm_device *dev, unsigned int *sequence)

{

	drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;

	unsigned int cur_fence;

	int ret = 0;



	/* Assume that the user has missed the current sequence number

	 * by about a day rather than she wants to wait for years

	 * using fences.

	 */

	DRM_WAIT_ON(ret, dev_priv->fence_queue, 3 * HZ,

	wait_event_timeout(dev_priv->fence_queue,

		    (((cur_fence = atomic_read(&dev_priv->last_fence_retired))

		      - *sequence) <= (1 << 23)));

		      - *sequence) <= (1 << 23)),

		    msecs_to_jiffies(3000));



	*sequence = cur_fence;



	return ret;

}



void mga_driver_irq_preinstall(struct drm_device *dev)

drivers/gpu/drm/mga/mga_state.c

+3 −3
Original line number Diff line number Diff line
@@ -1016,7 +1016,7 @@ int mga_getparam(struct drm_device *dev, void *data, struct drm_file *file_priv) 
		return -EINVAL;

	}



	DRM_DEBUG("pid=%d\n", DRM_CURRENTPID);

	DRM_DEBUG("pid=%d\n", task_pid_nr(current));



	switch (param->param) {

	case MGA_PARAM_IRQ_NR:
@@ -1048,7 +1048,7 @@ static int mga_set_fence(struct drm_device *dev, void *data, struct drm_file *fi 
		return -EINVAL;

	}



	DRM_DEBUG("pid=%d\n", DRM_CURRENTPID);

	DRM_DEBUG("pid=%d\n", task_pid_nr(current));



	/* I would normal do this assignment in the declaration of fence,

	 * but dev_priv may be NULL.
@@ -1077,7 +1077,7 @@ file_priv) 
		return -EINVAL;

	}



	DRM_DEBUG("pid=%d\n", DRM_CURRENTPID);

	DRM_DEBUG("pid=%d\n", task_pid_nr(current));



	mga_driver_fence_wait(dev, fence);

	return 0;

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