Commit 91eeafea authored by Thomas Gleixner's avatar Thomas Gleixner
Browse files

x86/entry: Switch page fault exception to IDTENTRY_RAW



Convert page fault exceptions to IDTENTRY_RAW:

  - Implement the C entry point with DEFINE_IDTENTRY_RAW
  - Add the CR2 read into the exception handler
  - Add the idtentry_enter/exit_cond_rcu() invocations in
    in the regular page fault handler and in the async PF
    part.
  - Emit the ASM stub with DECLARE_IDTENTRY_RAW
  - Remove the ASM idtentry in 64-bit
  - Remove the CR2 read from 64-bit
  - Remove the open coded ASM entry code in 32-bit
  - Fix up the XEN/PV code
  - Remove the old prototypes

No functional change.

Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
Acked-by: default avatarAndy Lutomirski <luto@kernel.org>
Link: https://lore.kernel.org/r/20200521202118.238455120@linutronix.de
parent 00cf8baf
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+0 −30
Original line number Diff line number Diff line
@@ -1398,36 +1398,6 @@ BUILD_INTERRUPT3(hv_stimer0_callback_vector, HYPERV_STIMER0_VECTOR,

#endif /* CONFIG_HYPERV */

SYM_CODE_START(page_fault)
	ASM_CLAC
	pushl	$do_page_fault
	jmp	common_exception_read_cr2
SYM_CODE_END(page_fault)

SYM_CODE_START_LOCAL_NOALIGN(common_exception_read_cr2)
	/* the function address is in %gs's slot on the stack */
	SAVE_ALL switch_stacks=1 skip_gs=1 unwind_espfix=1

	ENCODE_FRAME_POINTER

	/* fixup %gs */
	GS_TO_REG %ecx
	movl	PT_GS(%esp), %edi
	REG_TO_PTGS %ecx
	SET_KERNEL_GS %ecx

	GET_CR2_INTO(%ecx)			# might clobber %eax

	/* fixup orig %eax */
	movl	PT_ORIG_EAX(%esp), %edx		# get the error code
	movl	$-1, PT_ORIG_EAX(%esp)		# no syscall to restart

	TRACE_IRQS_OFF
	movl	%esp, %eax			# pt_regs pointer
	CALL_NOSPEC edi
	jmp	ret_from_exception
SYM_CODE_END(common_exception_read_cr2)

SYM_CODE_START_LOCAL_NOALIGN(common_exception)
	/* the function address is in %gs's slot on the stack */
	SAVE_ALL switch_stacks=1 skip_gs=1 unwind_espfix=1
+0 −19
Original line number Diff line number Diff line
@@ -506,15 +506,6 @@ SYM_CODE_END(spurious_entries_start)
	call	error_entry
	UNWIND_HINT_REGS

	.if \vector == X86_TRAP_PF
		/*
		 * Store CR2 early so subsequent faults cannot clobber it. Use R12 as
		 * intermediate storage as RDX can be clobbered in enter_from_user_mode().
		 * GET_CR2_INTO can clobber RAX.
		 */
		GET_CR2_INTO(%r12);
	.endif

	.if \sane == 0
	TRACE_IRQS_OFF

@@ -533,10 +524,6 @@ SYM_CODE_END(spurious_entries_start)
		movq	$-1, ORIG_RAX(%rsp)	/* no syscall to restart */
	.endif

	.if \vector == X86_TRAP_PF
		movq	%r12, %rdx		/* Move CR2 into 3rd argument */
	.endif

	call	\cfunc

	.if \sane == 0
@@ -1059,12 +1046,6 @@ apicinterrupt SPURIOUS_APIC_VECTOR spurious_interrupt smp_spurious_interrupt
apicinterrupt IRQ_WORK_VECTOR			irq_work_interrupt		smp_irq_work_interrupt
#endif

/*
 * Exception entry points.
 */

idtentry	X86_TRAP_PF		page_fault		do_page_fault			has_error_code=1

/*
 * Reload gs selector with exception handling
 * edi:  new selector
+2 −1
Original line number Diff line number Diff line
@@ -388,6 +388,7 @@ DECLARE_IDTENTRY_ERRORCODE(X86_TRAP_AC, exc_alignment_check);

/* Raw exception entries which need extra work */
DECLARE_IDTENTRY_RAW(X86_TRAP_BP,		exc_int3);
DECLARE_IDTENTRY_RAW_ERRORCODE(X86_TRAP_PF,	exc_page_fault);

#ifdef CONFIG_X86_MCE
DECLARE_IDTENTRY_MCE(X86_TRAP_MC,	exc_machine_check);
+0 −11
Original line number Diff line number Diff line
@@ -9,17 +9,6 @@
#include <asm/idtentry.h>
#include <asm/siginfo.h>			/* TRAP_TRACE, ... */

#define dotraplinkage __visible

asmlinkage void page_fault(void);
asmlinkage void async_page_fault(void);

#if defined(CONFIG_X86_64) && defined(CONFIG_XEN_PV)
asmlinkage void xen_page_fault(void);
#endif

dotraplinkage void do_page_fault(struct pt_regs *regs, unsigned long error_code, unsigned long address);

#ifdef CONFIG_X86_64
asmlinkage __visible notrace struct pt_regs *sync_regs(struct pt_regs *eregs);
asmlinkage __visible notrace
+2 −2
Original line number Diff line number Diff line
@@ -62,7 +62,7 @@ static const __initconst struct idt_data early_idts[] = {
	INTG(X86_TRAP_DB,		asm_exc_debug),
	SYSG(X86_TRAP_BP,		asm_exc_int3),
#ifdef CONFIG_X86_32
	INTG(X86_TRAP_PF,		page_fault),
	INTG(X86_TRAP_PF,		asm_exc_page_fault),
#endif
};

@@ -156,7 +156,7 @@ static const __initconst struct idt_data apic_idts[] = {
 * stacks work only after cpu_init().
 */
static const __initconst struct idt_data early_pf_idts[] = {
	INTG(X86_TRAP_PF,		page_fault),
	INTG(X86_TRAP_PF,		asm_exc_page_fault),
};

/*
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