KVM: vmx: fix underflow in TSC deadline calculation (9175d2e9) · Commits · 戴 / test

If the TSC deadline timer is programmed really close to the deadline or even in the past, the computation in vmx_set_hv_timer can underflow and cause delta_tsc to be set to a huge value. This generally results in vmx_set_hv_timer returning -ERANGE, but we can fix it by limiting delta_tsc to be positive or zero. Reported-by:

Wanpeng Li <wanpeng.li@hotmail.com> Signed-off-by:

Paolo Bonzini <pbonzini@redhat.com>

arch/x86/kvm/vmx.c

+3 −3

Original line number	Diff line number	Diff line
		@@ -10829,9 +10829,9 @@ static inline int u64_shl_div_u64(u64 a, unsigned int shift,
		static int vmx_set_hv_timer(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc)
		{
		struct vcpu_vmx *vmx = to_vmx(vcpu);
		u64 tscl = rdtsc(), delta_tsc;

		delta_tsc = guest_deadline_tsc - kvm_read_l1_tsc(vcpu, tscl);
		u64 tscl = rdtsc();
		u64 guest_tscl = kvm_read_l1_tsc(vcpu, tscl);
		u64 delta_tsc = max(guest_deadline_tsc, guest_tscl) - guest_tscl;

		/* Convert to host delta tsc if tsc scaling is enabled */
		if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio &&

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