Commit 914ee9c4 authored by Sasha Neftin's avatar Sasha Neftin Committed by Jeff Kirsher
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e1000e: Add support for Comet Lake



Add devices ID's for the next LOM generations that will be
available on the next Intel Client platform (Comet Lake)
This patch provides the initial support for these devices

Signed-off-by: default avatarSasha Neftin <sasha.neftin@intel.com>
Tested-by: default avatarAaron Brown <aaron.f.brown@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent 199f3ac3
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+6 −0
Original line number Diff line number Diff line
@@ -86,6 +86,12 @@ struct e1000_hw;
#define E1000_DEV_ID_PCH_ICP_I219_V8		0x15E0
#define E1000_DEV_ID_PCH_ICP_I219_LM9		0x15E1
#define E1000_DEV_ID_PCH_ICP_I219_V9		0x15E2
#define E1000_DEV_ID_PCH_CMP_I219_LM10		0x0D4E
#define E1000_DEV_ID_PCH_CMP_I219_V10		0x0D4F
#define E1000_DEV_ID_PCH_CMP_I219_LM11		0x0D4C
#define E1000_DEV_ID_PCH_CMP_I219_V11		0x0D4D
#define E1000_DEV_ID_PCH_CMP_I219_LM12		0x0D53
#define E1000_DEV_ID_PCH_CMP_I219_V12		0x0D55

#define E1000_REVISION_4	4

+6 −0
Original line number Diff line number Diff line
@@ -7749,6 +7749,12 @@ static const struct pci_device_id e1000_pci_tbl[] = {
	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_V8), board_pch_cnp },
	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_LM9), board_pch_cnp },
	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_V9), board_pch_cnp },
	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_LM10), board_pch_cnp },
	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_V10), board_pch_cnp },
	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_LM11), board_pch_cnp },
	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_V11), board_pch_cnp },
	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_LM12), board_pch_spt },
	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_V12), board_pch_spt },

	{ 0, 0, 0, 0, 0, 0, 0 }	/* terminate list */
};