Commit 912b330c authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'msm-next' of git://people.freedesktop.org/~robclark/linux into drm-next 

Big ticket items are hdmi support for 8996 (aka snapdragon 820), and
adreno 430 support.  Also one more small uapi addition to support
timestamp queries.

* 'msm-next' of git://people.freedesktop.org/~robclark/linux: (29 commits)
  drm/msm: rename hdmi symbols
  drm/msm/adreno: remove duplicate adreno_hw_init() call
  drm/msm: add timestamp param
  drm/msm: fix small typo
  drm/msm: grab struct_mutex after allocating submit
  drm/msm: reject submit ioctl if no gpu
  drm/msm/adreno: print details in case of a protect fault interrupt
  drm/msm/adreno: get CP_RPTR from register instead of shadow memory
  drm/msm/adreno: add adreno430 power control
  drm/msm/adreno: support for adreno 430.
  drm/msm: update generated headers
  drm/msm/dsi: fix definition of msm_dsi_pll_28nm_8960_init()
  drm/msm/dsi: Parse DSI lanes via DT
  drm/msm/dsi: Drop VDD regulator for MSM8916
  drm/msm/dsi: Remove incorrect warning on host attach
  drm/msm: Free fb helper resources in msm_unload
  drm/msm/mdp: Detach iommu in mdp4_destroy
  drm/msm: make iommu port names const'ier
  drm/msm/mdp: Use atomic helper to set crtc property
  dt-bindings: msm/hdmi: Add HDMI PHY bindings
  ...
parents 42e85606 fcda50c8

Documentation/devicetree/bindings/display/msm/dsi.txt

+29 −3
Original line number Diff line number Diff line
@@ -44,9 +44,34 @@ Optional properties: 
- pinctrl-names: the pin control state names; should contain "default"

- pinctrl-0: the default pinctrl state (active)

- pinctrl-n: the "sleep" pinctrl state

- port: DSI controller output port. This contains one endpoint subnode, with its

  remote-endpoint set to the phandle of the connected panel's endpoint.

- port: DSI controller output port, containing one endpoint subnode.



  DSI Endpoint properties:

  - remote-endpoint: set to phandle of the connected panel's endpoint.

    See Documentation/devicetree/bindings/graph.txt for device graph info.

  - qcom,data-lane-map: this describes how the logical DSI lanes are mapped

    to the physical lanes on the given platform. The value contained in

    index n describes what logical data lane is mapped to the physical data

    lane n (DATAn, where n lies between 0 and 3).



    For example:



    qcom,data-lane-map = <3 0 1 2>;



    The above mapping describes that the logical data lane DATA3 is mapped to

    the physical data lane DATA0, logical DATA0 to physical DATA1, logic DATA1

    to phys DATA2 and logic DATA2 to phys DATA3.



    There are only a limited number of physical to logical mappings possible:



    "0123": Logic 0->Phys 0; Logic 1->Phys 1; Logic 2->Phys 2; Logic 3->Phys 3;

    "3012": Logic 3->Phys 0; Logic 0->Phys 1; Logic 1->Phys 2; Logic 2->Phys 3;

    "2301": Logic 2->Phys 0; Logic 3->Phys 1; Logic 0->Phys 2; Logic 1->Phys 3;

    "1230": Logic 1->Phys 0; Logic 2->Phys 1; Logic 3->Phys 2; Logic 0->Phys 3;

    "0321": Logic 0->Phys 0; Logic 3->Phys 1; Logic 2->Phys 2; Logic 1->Phys 3;

    "1032": Logic 1->Phys 0; Logic 0->Phys 1; Logic 3->Phys 2; Logic 2->Phys 3;

    "2103": Logic 2->Phys 0; Logic 1->Phys 1; Logic 0->Phys 2; Logic 3->Phys 3;

    "3210": Logic 3->Phys 0; Logic 2->Phys 1; Logic 1->Phys 2; Logic 0->Phys 3;



DSI PHY:

Required properties:
@@ -131,6 +156,7 @@ Example: 
		port {

			dsi0_out: endpoint {

				remote-endpoint = <&panel_in>;

				lanes = <0 1 2 3>;

			};

		};

	};

Documentation/devicetree/bindings/display/msm/hdmi.txt

+44 −2
Original line number Diff line number Diff line
@@ -11,6 +11,7 @@ Required properties: 
- reg: Physical base address and length of the controller's registers

- reg-names: "core_physical"

- interrupts: The interrupt signal from the hdmi block.

- power-domains: Should be <&mmcc MDSS_GDSC>.

- clocks: device clocks

  See ../clocks/clock-bindings.txt for details.

- qcom,hdmi-tx-ddc-clk-gpio: ddc clk pin
@@ -18,6 +19,8 @@ Required properties: 
- qcom,hdmi-tx-hpd-gpio: hpd pin

- core-vdda-supply: phandle to supply regulator

- hdmi-mux-supply: phandle to mux regulator

- phys: the phandle for the HDMI PHY device

- phy-names: the name of the corresponding PHY device



Optional properties:

- qcom,hdmi-tx-mux-en-gpio: hdmi mux enable pin
@@ -27,15 +30,38 @@ Optional properties: 
- pinctrl-0: the default pinctrl state (active)

- pinctrl-1: the "sleep" pinctrl state



HDMI PHY:

Required properties:

- compatible: Could be the following

  * "qcom,hdmi-phy-8660"

  * "qcom,hdmi-phy-8960"

  * "qcom,hdmi-phy-8974"

  * "qcom,hdmi-phy-8084"

  * "qcom,hdmi-phy-8996"

- #phy-cells: Number of cells in a PHY specifier; Should be 0.

- reg: Physical base address and length of the registers of the PHY sub blocks.

- reg-names: The names of register regions. The following regions are required:

  * "hdmi_phy"

  * "hdmi_pll"

  For HDMI PHY on msm8996, these additional register regions are required:

    * "hdmi_tx_l0"

    * "hdmi_tx_l1"

    * "hdmi_tx_l3"

    * "hdmi_tx_l4"

- power-domains: Should be <&mmcc MDSS_GDSC>.

- clocks: device clocks

  See Documentation/devicetree/bindings/clocks/clock-bindings.txt for details.

- core-vdda-supply: phandle to vdda regulator device node



Example:



/ {

	...



	hdmi: qcom,hdmi-tx-8960@4a00000 {

	hdmi: hdmi@4a00000 {

		compatible = "qcom,hdmi-tx-8960";

		reg-names = "core_physical";

		reg = <0x04a00000 0x1000>;

		reg = <0x04a00000 0x2f0>;

		interrupts = <GIC_SPI 79 0>;

		power-domains = <&mmcc MDSS_GDSC>;

		clock-names =
@@ -54,5 +80,21 @@ Example: 
		pinctrl-names = "default", "sleep";

		pinctrl-0 = <&hpd_active  &ddc_active  &cec_active>;

		pinctrl-1 = <&hpd_suspend &ddc_suspend &cec_suspend>;



		phys = <&hdmi_phy>;

		phy-names = "hdmi_phy";

	};



	hdmi_phy: phy@4a00400 {

		compatible = "qcom,hdmi-phy-8960";

		reg-names = "hdmi_phy",

			    "hdmi_pll";

		reg = <0x4a00400 0x60>,

		      <0x4a00500 0x100>;

		#phy-cells = <0>;

		power-domains = <&mmcc MDSS_GDSC>;

		clock-names = "slave_iface_clk";

		clocks = <&mmcc HDMI_S_AHB_CLK>;

		core-vdda-supply = <&pm8921_hdmi_mvs>;

	};

};

drivers/gpu/drm/msm/Makefile

+3 −0
Original line number Diff line number Diff line
@@ -12,6 +12,7 @@ msm-y := \ 
	hdmi/hdmi_connector.o \

	hdmi/hdmi_hdcp.o \

	hdmi/hdmi_i2c.o \

	hdmi/hdmi_phy.o \

	hdmi/hdmi_phy_8960.o \

	hdmi/hdmi_phy_8x60.o \

	hdmi/hdmi_phy_8x74.o \
@@ -52,6 +53,8 @@ msm-y := \ 


msm-$(CONFIG_DRM_FBDEV_EMULATION) += msm_fbdev.o

msm-$(CONFIG_COMMON_CLK) += mdp/mdp4/mdp4_lvds_pll.o

msm-$(CONFIG_COMMON_CLK) += hdmi/hdmi_pll_8960.o

msm-$(CONFIG_COMMON_CLK) += hdmi/hdmi_phy_8996.o



msm-$(CONFIG_DRM_MSM_DSI) += dsi/dsi.o \

			mdp/mdp4/mdp4_dsi_encoder.o \

drivers/gpu/drm/msm/adreno/a2xx.xml.h

+6 −5
Original line number Diff line number Diff line
@@ -9,16 +9,17 @@ git clone https://github.com/freedreno/envytools.git 


The rules-ng-ng source files this header was generated from are:

- /home/robclark/src/freedreno/envytools/rnndb/adreno.xml               (    398 bytes, from 2015-09-24 17:25:31)

- /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml  (   1453 bytes, from 2015-05-20 20:03:07)

- /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml  (   1572 bytes, from 2016-02-10 17:07:21)

- /home/robclark/src/freedreno/envytools/rnndb/adreno/a2xx.xml          (  32901 bytes, from 2015-05-20 20:03:14)

- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml (  10755 bytes, from 2015-09-14 20:46:55)

- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml    (  14968 bytes, from 2015-05-20 20:12:27)

- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml          (  67771 bytes, from 2015-09-14 20:46:55)

- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml          (  63970 bytes, from 2015-09-14 20:50:12)

- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_common.xml (  11518 bytes, from 2016-02-10 21:03:25)

- /home/robclark/src/freedreno/envytools/rnndb/adreno/adreno_pm4.xml    (  16166 bytes, from 2016-02-11 21:20:31)

- /home/robclark/src/freedreno/envytools/rnndb/adreno/a3xx.xml          (  83967 bytes, from 2016-02-10 17:07:21)

- /home/robclark/src/freedreno/envytools/rnndb/adreno/a4xx.xml          ( 109916 bytes, from 2016-02-20 18:44:48)

- /home/robclark/src/freedreno/envytools/rnndb/adreno/ocmem.xml         (   1773 bytes, from 2015-09-24 17:30:00)



Copyright (C) 2013-2015 by the following authors:

- Rob Clark <robdclark@gmail.com> (robclark)

- Ilia Mirkin <imirkin@alum.mit.edu> (imirkin)



Permission is hereby granted, free of charge, to any person obtaining

a copy of this software and associated documentation files (the

drivers/gpu/drm/msm/adreno/a3xx.xml.h

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