perf/x86/msr: Clean up the code (9128d3ed) · Commits · 戴 / test

arch/x86/events/msr.c

+29 −32

Original line number	Diff line number	Diff line
		@@ -36,7 +36,6 @@ static bool test_therm_status(int idx)
		return boot_cpu_has(X86_FEATURE_DTHERM);
		}


		static bool test_intel(int idx)
		{
		if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL \|\|
		@@ -198,7 +197,7 @@ static void msr_event_update(struct perf_event *event)
		u64 prev, now;
		s64 delta;

		/* Careful, an NMI might modify the previous event value. */
		/* Careful, an NMI might modify the previous event value: */
		again:
		prev = local64_read(&event->hw.prev_count);
		now = msr_read_counter(event);
		@@ -211,18 +210,18 @@ again:
		delta = sign_extend64(delta, 31);
		local64_add(delta, &event->count);
		} else if (unlikely(event->hw.event_base == MSR_IA32_THERM_STATUS)) {
		/* if valid, extract digital readout, other set to -1 */
		/* If valid, extract digital readout, otherwise set to -1: */
		now = now & (1ULL << 31) ? (now >> 16) & 0x3f : -1;
		local64_set(&event->count, now);
		} else
		} else {
		local64_add(delta, &event->count);
		}
		}

		static void msr_event_start(struct perf_event *event, int flags)
		{
		u64 now;
		u64 now = msr_read_counter(event);

		now = msr_read_counter(event);
		local64_set(&event->hw.prev_count, now);
		}

		@@ -269,9 +268,7 @@ static int __init msr_init(void)
		for (i = PERF_MSR_TSC + 1; i < PERF_MSR_EVENT_MAX; i++) {
		u64 val;

		/*
		* Virt sucks arse; you cannot tell if a R/O MSR is present :/
		*/
		/* Virt sucks; you cannot tell if a R/O MSR is present :/ */
		if (!msr[i].test(i) \|\| rdmsrl_safe(msr[i].msr, &val))
		msr[i].attr = NULL;
		}