Commit 91035cb0 authored by Wen He's avatar Wen He Committed by Shawn Guo
Browse files

arm64: dts: ls1028a: Update #clock-cells of dpclk node 



Update the property #clock-cells = <1> to #clock-cells = <0> of the
dpclk, since the Display output pixel clock driver provides single
clock output.

Signed-off-by: default avatarWen He <wen.he_1@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 13645b1a

arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -82,7 +82,7 @@ 
	dpclk: clock-controller@f1f0000 {

		compatible = "fsl,ls1028a-plldig";

		reg = <0x0 0xf1f0000 0x0 0xffff>;

		#clock-cells = <1>;

		#clock-cells = <0>;

		clocks = <&osc_27m>;

	};
@@ -665,7 +665,7 @@ 
		interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>,

			     <0 223 IRQ_TYPE_LEVEL_HIGH>;

		interrupt-names = "DE", "SE";

		clocks = <&dpclk 0>, <&clockgen 2 2>, <&clockgen 2 2>,

		clocks = <&dpclk>, <&clockgen 2 2>, <&clockgen 2 2>,

			 <&clockgen 2 2>;

		clock-names = "pxlclk", "mclk", "aclk", "pclk";

		arm,malidp-output-port-lines = /bits/ 8 <8 8 8>;

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